369 lines
3.9 KiB
Plaintext
369 lines
3.9 KiB
Plaintext
;------------------------------------------------;
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; Constants
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.equ RAMTOP = 0x60 ; SRAM top address
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.equ RAMTOP100 = 0x100 ; For memory mapped I/O devices
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.equ bit0 = 0b00000001
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.equ bit1 = 0b00000010
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.equ bit2 = 0b00000100
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.equ bit3 = 0b00001000
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.equ bit4 = 0b00010000
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.equ bit5 = 0b00100000
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.equ bit6 = 0b01000000
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.equ bit7 = 0b10000000
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.def T0L = r0
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.def T0H = r1
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.def T2L = r2
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.def T2H = r3
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.def T4L = r4
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.def T4H = r5
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.def T6L = r6
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.def T6H = r7
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.def T8L = r8
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.def T8H = r9
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.def T10L = r10
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.def T10H = r11
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.def T12L = r12
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.def T12H = r13
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.def T14L = r14
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.def T14H = r15
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.def AL = r16
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.def AH = r17
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.def BL = r18
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.def BH = r19
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.def CL = r20
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.def CH = r21
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.def DL = r22
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.def DH = r23
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.def EL = r24
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.def EH = r25
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;------------------------------------------------;
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; Push/Pop register pair
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;
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; pushw Z
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.macro pushw
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push @0H
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push @0L
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.endm
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.macro popw
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pop @0L
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pop @0H
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.endm
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;------------------------------------------------;
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; Load/store word from/to direct memory/immediate
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;
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; ldsw Z,mem
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; ldiw Z,imm
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.macro ldiw
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ldi @0L,low(@1)
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ldi @0H,high(@1)
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.endm
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.macro ldsw
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lds @0L,@1
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lds @0H,@1+1
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.endm
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.macro stsw
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sts @0+1,@1H
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sts @0,@1L
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.endm
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.macro lddw
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ldd @0L,@1
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ldd @0H,@1+1
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.endm
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.macro stdw
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std @0+1,@1H
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std @0,@1L
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.endm
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.macro ldw
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ld @0L,@1
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ld @0H,@1
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.endm
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.macro stw
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st @0,@1L
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st @0,@1H
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.endm
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.macro inw
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in @0L,@1L
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in @0H,@1H
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.endm
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.macro outw
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out @0H,@1H
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out @0L,@1L
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.endm
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;------------------------------------------------;
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; Store immediate into indirect memory via r16
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;
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; sti Z,imm
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; stdi Z+d,imm
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.macro sti
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ldi r16,@1
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st @0,r16
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.endm
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.macro stdi
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ldi r16,@1
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std @0,r16
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.endm
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.macro muli
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ldi r16,@1
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mul @0,r16
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.endm
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;------------------------------------------------;
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; add/sub/subc/cp/cpc/lsl/lsr/rol/ror to register pair
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;
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.macro addiw
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subi @0L,low(-(@1))
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sbci @0H,high(-(@1))
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.endm
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.macro subiw
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subi @0L,low(@1)
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sbci @0H,high(@1)
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.endm
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.macro addw
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add @0L,@1L
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adc @0H,@1H
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.endm
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.macro adcw
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adc @0L,@1L
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adc @0H,@1H
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.endm
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.macro subw
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sub @0L,@1L
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sbc @0H,@1H
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.endm
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.macro sbcw
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sbc @0L,@1L
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sbc @0H,@1H
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.endm
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.macro cpw
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cp @0L,@1L
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cpc @0H,@1H
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.endm
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.macro cpcw
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cpc @0L,@1L
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cpc @0H,@1H
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.endm
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.macro cpiw
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cpi @0L,low(@1)
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ldi r16,high(@1)
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cpc @0H,r16
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.endm
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.macro andw
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and @0L,@1L
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and @0H,@1H
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.endm
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.macro andiw
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andi @0L,low(@1)
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andi @0H,high(@1)
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.endm
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.macro orw
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or @0L,@1L
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or @0H,@1H
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.endm
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.macro oriw
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ori @0L,low(@1)
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ori @0H,high(@1)
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.endm
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.macro lslw
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lsl @0L
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rol @0H
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.endm
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.macro lsrw
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lsr @0H
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ror @0L
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.endm
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.macro asrw
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asr @0H
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ror @0L
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.endm
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.macro rolw
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rol @0L
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rol @0H
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.endm
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.macro rorw
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ror @0H
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ror @0L
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.endm
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.macro clrw
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clr @0L
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clr @0H
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.endm
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.macro comw
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com @0L
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com @0H
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.endm
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.macro negw
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com @0H
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neg @0L
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brne PC+2
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inc @0H
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.endm
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.macro movew
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mov @0L, @1L
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mov @0H, @1H
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.endm
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.macro lpmw
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lpm @0L, @1
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lpm @0H, @1
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.endm
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;------------------------------------------------;
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; Store immediate into direct memory via r16
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;
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; stsi var,imm
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.macro stsi
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ldi r16,@1
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sts @0,r16
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.endm
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;------------------------------------------------;
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; Output port immediate via r16
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;
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; outi port,var
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.macro outi
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ldi r16,@1
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out @0,r16
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.endm
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;------------------------------------------------;
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; Add immediate to register
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.macro addi
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subi @0,-(@1)
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.endm
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;------------------------------------------------;
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; Long branch
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.macro rjne
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breq PC+2
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rjmp @0
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.endm
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.macro rjeq
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brne PC+2
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rjmp @0
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.endm
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.macro rjcc
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brcs PC+2
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rjmp @0
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.endm
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.macro rjcs
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brcc PC+2
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rjmp @0
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.endm
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.macro rjtc
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brts PC+2
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rjmp @0
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.endm
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.macro rjts
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brtc PC+2
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rjmp @0
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.endm
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.macro rjge
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brlt PC+2
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rjmp @0
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.endm
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.macro rjlt
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brge PC+2
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rjmp @0
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.endm
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.macro retcc
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brcs PC+2
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ret
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.endm
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.macro retcs
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brcc PC+2
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ret
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.endm
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.macro reteq
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brne PC+2
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ret
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.endm
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.macro retne
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breq PC+2
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ret
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.endm
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;------------------------------------------------;
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; Move single bit between two registers
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;
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; bmov dstreg,dstbit,srcreg.srcbit
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.macro movb
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bst @2,@3
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bld @0,@1
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.endm
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