ChipTest/PAN159/PAN159-Template/SampleCode/Template/Keil/lst/system_mini58series.txt
2021-09-26 17:19:12 +08:00

173 lines
6.8 KiB
Plaintext

; generated by Component: ARM Compiler 5.06 update 4 (build 422) Tool: ArmCC [4d3604]
; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave -o.\obj\system_mini58series.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\system_mini58series.d --cpu=Cortex-M0 --apcs=interwork -O3 --diag_suppress=9931 -I..\..\..\Library\CMSIS\Include -I..\..\..\Library\Device\Nuvoton\Mini58Series\Include -I..\..\..\Library\StdDriver\inc -I..\..\Template -I..\..\..\Library\StdDriver\driver -I.\RTE\_Template -ID:\Keil_v5\ARM\PACK\Nuvoton\NuMicro_DFP\1.0.9\Device\Mini58\Include -ID:\Keil_v5\ARM\CMSIS\Include -D__MICROLIB -D__UVISION_VERSION=523 --omf_browse=.\obj\system_mini58series.crf ..\..\..\Library\Device\Nuvoton\Mini58Series\Source\system_Mini58Series.c]
THUMB
AREA ||i.SystemCoreClockUpdate||, CODE, READONLY, ALIGN=2
SystemCoreClockUpdate PROC
;;;41
;;;42 void SystemCoreClockUpdate (void)
000000 b5f8 PUSH {r3-r7,lr}
000002 a020 ADR r0,|L1.132|
000004 6800 LDR r0,[r0,#0]
000006 4e20 LDR r6,|L1.136|
000008 9000 STR r0,[sp,#0]
00000a 6a31 LDR r1,[r6,#0x20]
00000c 1330 ASRS r0,r6,#12
00000e 4c1f LDR r4,|L1.140|
000010 4f1f LDR r7,|L1.144|
000012 4201 TST r1,r0
;;;43 {
000014 d001 BEQ |L1.26|
000016 2000 MOVS r0,#0
000018 e016 B |L1.72|
|L1.26|
00001a 0308 LSLS r0,r1,#12
00001c d501 BPL |L1.34|
00001e 4620 MOV r0,r4
000020 e000 B |L1.36|
|L1.34|
000022 4638 MOV r0,r7
|L1.36|
000024 038a LSLS r2,r1,#14
000026 d40f BMI |L1.72|
000028 040a LSLS r2,r1,#16
00002a 0f92 LSRS r2,r2,#30
00002c 466b MOV r3,sp
00002e 5c9b LDRB r3,[r3,r2]
000030 05ca LSLS r2,r1,#23
000032 0489 LSLS r1,r1,#18
000034 0dd2 LSRS r2,r2,#23
000036 0ec9 LSRS r1,r1,#27
000038 1c89 ADDS r1,r1,#2
00003a 0880 LSRS r0,r0,#2
00003c 1c92 ADDS r2,r2,#2
00003e 4359 MULS r1,r3,r1
000040 4350 MULS r0,r2,r0
000042 f7fffffe BL __aeabi_uidivmod
000046 0080 LSLS r0,r0,#2
|L1.72|
;;;44 uint32_t u32CoreFreq, u32ClkSrc;
;;;45
;;;46 /* Update PLL Clock */
;;;47 PllClock = CLK_GetPLLClockFreq();
000048 4d12 LDR r5,|L1.148|
;;;48
;;;49 u32ClkSrc = CLK->CLKSEL0 & CLK_CLKSEL0_HCLKSEL_Msk;
00004a 6028 STR r0,[r5,#0] ; PllClock
00004c 6931 LDR r1,[r6,#0x10]
00004e 0749 LSLS r1,r1,#29
000050 0f49 LSRS r1,r1,#29
;;;50
;;;51 if (u32ClkSrc == 0)
000052 d012 BEQ |L1.122|
;;;52 u32CoreFreq = __XTAL; /* External crystal clock */
;;;53 else if (u32ClkSrc ==2)
000054 2902 CMP r1,#2
000056 d002 BEQ |L1.94|
;;;54 u32CoreFreq = PllClock; /* PLL clock */
;;;55 else if (u32ClkSrc == 3)
000058 2903 CMP r1,#3
00005a d010 BEQ |L1.126|
;;;56 u32CoreFreq = __IRC10K; /* Internal 10K crystal clock */
;;;57 else if (u32ClkSrc == 7)
;;;58 u32CoreFreq = __HIRC; /* Factory Default is internal RC */
00005c 4620 MOV r0,r4
|L1.94|
;;;59 else
;;;60 u32CoreFreq = __HIRC; /* unknown value, use Factory Default is internal RC */
;;;61
;;;62 SystemCoreClock = (u32CoreFreq/((CLK->CLKDIV & CLK_CLKDIV_HCLKDIV_Msk) + 1));
00005e 69b1 LDR r1,[r6,#0x18]
000060 0709 LSLS r1,r1,#28
000062 0f09 LSRS r1,r1,#28
000064 1c49 ADDS r1,r1,#1
000066 f7fffffe BL __aeabi_uidivmod
;;;63 CyclesPerUs = (SystemCoreClock + 500000) / 1000000;
00006a 490b LDR r1,|L1.152|
00006c 6068 STR r0,[r5,#4] ; SystemCoreClock
00006e 104a ASRS r2,r1,#1
000070 1880 ADDS r0,r0,r2
000072 f7fffffe BL __aeabi_uidivmod
000076 60a8 STR r0,[r5,#8] ; CyclesPerUs
;;;64 }
000078 bdf8 POP {r3-r7,pc}
|L1.122|
00007a 4638 MOV r0,r7 ;52
00007c e7ef B |L1.94|
|L1.126|
00007e 4807 LDR r0,|L1.156|
000080 e7ed B |L1.94|
;;;65
ENDP
000082 0000 DCW 0x0000
|L1.132|
000084 01020204 DCB 1,2,2,4
|L1.136|
DCD 0x50000200
|L1.140|
DCD 0x01518000
|L1.144|
DCD 0x00b71b00
|L1.148|
DCD ||area_number.6||
|L1.152|
DCD 0x000f4240
|L1.156|
DCD 0x00002710
AREA ||i.SystemInit||, CODE, READONLY, ALIGN=1
SystemInit PROC
;;;29
;;;30 void SystemInit (void)
000000 4770 BX lr
;;;31 {
;;;32
;;;33 }
;;;34
ENDP
AREA ||.data||, DATA, ALIGN=2
__HSI
DCD 0x01518000
AREA ||area_number.6||, DATA, ALIGN=2
EXPORTAS ||area_number.6||, ||.data||
PllClock
DCD 0x01518000
SystemCoreClock
DCD 0x00000000
CyclesPerUs
DCD 0x00000000
;*** Start embedded assembler ***
#line 1 "..\\..\\..\\Library\\Device\\Nuvoton\\Mini58Series\\Source\\system_Mini58Series.c"
AREA ||.rev16_text||, CODE
THUMB
EXPORT |__asm___21_system_Mini58Series_c___HSI____REV16|
#line 388 "..\\..\\..\\Library\\CMSIS\\Include\\cmsis_armcc.h"
|__asm___21_system_Mini58Series_c___HSI____REV16| PROC
#line 389
rev16 r0, r0
bx lr
ENDP
AREA ||.revsh_text||, CODE
THUMB
EXPORT |__asm___21_system_Mini58Series_c___HSI____REVSH|
#line 402
|__asm___21_system_Mini58Series_c___HSI____REVSH| PROC
#line 403
revsh r0, r0
bx lr
ENDP
;*** End embedded assembler ***