209 lines
7.7 KiB
Plaintext
209 lines
7.7 KiB
Plaintext
; generated by Component: ARM Compiler 5.06 update 4 (build 422) Tool: ArmCC [4d3604]
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; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave -o.\obj\main.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\main.d --cpu=Cortex-M0 --apcs=interwork -O3 --diag_suppress=9931 -I..\..\..\Library\CMSIS\Include -I..\..\..\Library\Device\Nuvoton\Mini58Series\Include -I..\..\..\Library\StdDriver\inc -I..\..\Template -I..\..\..\Library\StdDriver\driver -I.\RTE\_Template -ID:\Keil_v5\ARM\PACK\Nuvoton\NuMicro_DFP\1.0.9\Device\Mini58\Include -ID:\Keil_v5\ARM\CMSIS\Include -D__MICROLIB -D__UVISION_VERSION=523 --omf_browse=.\obj\main.crf ..\main.c]
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THUMB
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AREA ||i.SYS_Init||, CODE, READONLY, ALIGN=2
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SYS_Init PROC
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;;;26
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;;;27 void SYS_Init(void)
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000000 b570 PUSH {r4-r6,lr}
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000002 2259 MOVS r2,#0x59
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000004 4c17 LDR r4,|L1.100|
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000006 2016 MOVS r0,#0x16
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000008 2188 MOVS r1,#0x88
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|L1.10|
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00000a 6022 STR r2,[r4,#0]
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00000c 6020 STR r0,[r4,#0]
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00000e 6021 STR r1,[r4,#0]
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000010 6823 LDR r3,[r4,#0]
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000012 2b00 CMP r3,#0
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000014 d0f9 BEQ |L1.10|
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;;;28 {
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;;;29 /* Unlock protected registers */
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;;;30 SYS_UnlockReg();
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;;;31
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;;;32 /* Enable external 12MHz XTAL, HIRC */
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;;;33 CLK->PWRCTL = CLK_PWRCTL_HIRCEN_Msk;
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000016 4914 LDR r1,|L1.104|
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000018 2004 MOVS r0,#4
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00001a 6008 STR r0,[r1,#0]
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;;;34
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;;;35 /* Enable HIRC clock (Internal RC 22.1184MHz) */
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;;;36 CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
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00001c f7fffffe BL CLK_EnableXtalRC
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;;;37
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;;;38 /* Wait for HIRC clock ready */
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;;;39 CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
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000020 2010 MOVS r0,#0x10
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000022 f7fffffe BL CLK_WaitClockReady
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;;;40
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;;;41 /* Switch HCLK clock source to XTL */
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;;;42 CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC,CLK_CLKDIV_HCLK(1));
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000026 2100 MOVS r1,#0
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000028 2007 MOVS r0,#7
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00002a f7fffffe BL CLK_SetHCLK
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;;;43 CLK_SetCoreClock(50000000U);
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00002e 480f LDR r0,|L1.108|
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000030 f7fffffe BL CLK_SetCoreClock
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;;;44
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;;;45 // /* STCLK to XTL STCLK to XTL */
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;;;46 // CLK_SetSysTickClockSrc(CLK_CLKSEL0_HCLKSEL_HIRC);
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;;;47
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;;;48
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;;;49 // Enable module clock
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;;;50 CLK_EnableModuleClock(UART0_MODULE);
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000034 480e LDR r0,|L1.112|
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000036 f7fffffe BL CLK_EnableModuleClock
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;;;51 //CLK_EnableModuleClock(UART1_MODULE);
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;;;52 CLK_EnableModuleClock(ADC_MODULE);
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00003a 4d0e LDR r5,|L1.116|
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00003c 4628 MOV r0,r5
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00003e f7fffffe BL CLK_EnableModuleClock
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;;;53 CLK_SetModuleClock(ADC_MODULE,CLK_CLKSEL1_ADCSEL_HCLK,CLK_CLKDIV_ADC(6));
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000042 2205 MOVS r2,#5
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000044 0412 LSLS r2,r2,#16
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000046 2108 MOVS r1,#8
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000048 4628 MOV r0,r5
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00004a f7fffffe BL CLK_SetModuleClock
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;;;54 CLK_EnableModuleClock(PWMCH01_MODULE);
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00004e 480a LDR r0,|L1.120|
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000050 f7fffffe BL CLK_EnableModuleClock
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;;;55 CLK_EnableModuleClock(PWMCH23_MODULE);
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000054 4809 LDR r0,|L1.124|
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000056 f7fffffe BL CLK_EnableModuleClock
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;;;56
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;;;57 /* Update System Core Clock */
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;;;58 /* User can use SystemCoreClockUpdate() to calculate SystemCoreClock and cyclesPerUs automatically. */
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;;;59 SystemCoreClockUpdate();
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00005a f7fffffe BL SystemCoreClockUpdate
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00005e 2000 MOVS r0,#0
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000060 6020 STR r0,[r4,#0]
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;;;60
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;;;61
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;;;62 /* Lock protected registers */
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;;;63 SYS_LockReg();
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;;;64
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;;;65
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;;;66 }
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000062 bd70 POP {r4-r6,pc}
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;;;67
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ENDP
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|L1.100|
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DCD 0x50000100
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|L1.104|
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DCD 0x50000200
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|L1.108|
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DCD 0x02faf080
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|L1.112|
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DCD 0xa7803d10
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|L1.116|
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DCD 0xa623fe1c
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|L1.120|
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DCD 0xa7c00014
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|L1.124|
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DCD 0xa7e00015
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AREA ||i.main||, CODE, READONLY, ALIGN=2
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main PROC
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;;;69 uint8_t somtingtest[2] = {0x12,0x32};
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;;;70 int main()
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000000 f7fffffe BL SYS_Init
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;;;71 {
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;;;72 SYS_Init();
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;;;73 iic_pan159_init();
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000004 f7fffffe BL iic_pan159_init
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;;;74 uart_init_pan159();
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000008 f7fffffe BL uart_init_pan159
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;;;75 printf("adc value is");
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00000c a00b ADR r0,|L2.60|
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00000e f7fffffe BL __2printf
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;;;76 rfspi_pan159_init();
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000012 f7fffffe BL rfspi_pan159_init
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;;;77 pwm_pan159_init(12000);
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000016 480d LDR r0,|L2.76|
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000018 f7fffffe BL pwm_pan159_init
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;;;78 adc_pan159_init();
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00001c f7fffffe BL adc_pan159_init
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;;;79 rf_init();
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000020 f7fffffe BL rf_init
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;;;80
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;;;81 while(1){
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;;;82 adc_pan159_samp1(adc2_value);
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;;;83 //uart_send(somtingtest,1);
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;;;84 //printf("adc value is");
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;;;85 delay_ms(50);
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000024 4d0a LDR r5,|L2.80|
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000026 2631 MOVS r6,#0x31 ;81
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|L2.40|
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000028 480a LDR r0,|L2.84|
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00002a f7fffffe BL adc_pan159_samp1
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00002e 4634 MOV r4,r6 ;81
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|L2.48|
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000030 4628 MOV r0,r5
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000032 f7fffffe BL __delay_pan159
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000036 1e64 SUBS r4,r4,#1
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000038 d2fa BCS |L2.48|
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00003a e7f5 B |L2.40|
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;;;86 }
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;;;87
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;;;88 }
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;;;89
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ENDP
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|L2.60|
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00003c 61646320 DCB "adc value is",0
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000040 76616c75
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000044 65206973
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000048 00
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000049 00 DCB 0
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00004a 00 DCB 0
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00004b 00 DCB 0
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|L2.76|
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DCD 0x00002ee0
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|L2.80|
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DCD 0x00023238
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|L2.84|
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DCD ||area_number.6||
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AREA ||.data||, DATA, ALIGN=0
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somtingtest
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000000 1232 DCB 0x12,0x32
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AREA ||area_number.6||, DATA, ALIGN=1
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EXPORTAS ||area_number.6||, ||.data||
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adc2_value
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DCDU 0x00000000
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;*** Start embedded assembler ***
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#line 1 "..\\main.c"
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AREA ||.rev16_text||, CODE
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THUMB
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EXPORT |__asm___6_main_c_SYS_Init____REV16|
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#line 388 "..\\..\\..\\Library\\CMSIS\\Include\\cmsis_armcc.h"
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|__asm___6_main_c_SYS_Init____REV16| PROC
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#line 389
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rev16 r0, r0
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bx lr
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ENDP
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AREA ||.revsh_text||, CODE
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THUMB
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EXPORT |__asm___6_main_c_SYS_Init____REVSH|
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#line 402
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|__asm___6_main_c_SYS_Init____REVSH| PROC
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#line 403
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revsh r0, r0
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bx lr
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ENDP
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;*** End embedded assembler ***
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__ARM_use_no_argv EQU 0
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