217 lines
7.1 KiB
C
217 lines
7.1 KiB
C
/*******************************************************************************
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* @note Copyright (C) 2018 Shanghai Panchip Microelectronics Co., Ltd.
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* All rights reserved.
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*
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* @file lib_driver_iic_pan159.c
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* @brief PAN159 hardware IICÇý¶¯
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*
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* @history - V1.0, 2018-01-19, huoweibin, first implementation.
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*******************************************************************************/
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#include "lib_driver_iic_pan159.h"
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//#include <string.h>
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uint8_t g_u8DeviceAddr;
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uint8_t g_u8RegAddr;
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//uint8_t g_au8TxData[64];
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//uint8_t g_u8RxData[64];
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uint8_t g_u8DataLen;
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uint8_t g_u8DataLenMax;
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uint8_t __IO g_u8EndFlag = 0;
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typedef void (*TCallback)(void);
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typedef void (*I2C_FUNC)(uint32_t u32Status,uint8_t *buf,TCallback cbk, TCallback fail_cbk);
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I2C_FUNC __IO s_I2CHandlerFn = NULL;
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TCallback __IO cbk_success = NULL;
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TCallback __IO cbk_failed = NULL;
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uint8_t* buf_addr = NULL;
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/*---------------------------------------------------------------------------------------------------------*/
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/* I2C IRQ Handler */
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/*---------------------------------------------------------------------------------------------------------*/
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void I2C0_IRQHandler(void)
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{
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uint32_t u32Status;
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u32Status = I2C_GET_STATUS(I2C0);
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if (I2C_GET_TIMEOUT_FLAG(I2C0)) {
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/* Clear I2C Timeout Flag */
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I2C_ClearTimeoutFlag(I2C0);
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}
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else {
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if (s_I2CHandlerFn != NULL)
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s_I2CHandlerFn(u32Status,buf_addr,cbk_success,cbk_failed);
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}
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}
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void iic_pan159_init(void)
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{
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//uint32_t u32Div;
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CLK_EnableModuleClock(I2C0_MODULE);
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SYS->P3_MFP &= ~SYS_MFP_P34_Msk;
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SYS->P3_MFP |= SYS_MFP_P34_I2C0_SDA;
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SYS->P3_MFP &= ~SYS_MFP_P35_Msk;
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SYS->P3_MFP |= SYS_MFP_P35_I2C0_SCL;
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SYS->IPRST1 |= SYS_IPRST1_I2C0RST_Msk;
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SYS->IPRST1 &= ~SYS_IPRST1_I2C0RST_Msk;
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I2C_Open(I2C0,400000);
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// u32Div = (uint32_t) (((SystemCoreClock * 10)/(400000 * 4) + 5) / 10 - 1); /* Compute proper divider for I2C clock */
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// I2C0->CLKDIV = u32Div;
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// I2C0->CTL |= I2C_CTL_I2CEN_Msk;
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I2C0->CTL |= I2C_CTL_INTEN_Msk;
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NVIC_EnableIRQ(I2C0_IRQn);
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}
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void iic_master_tx(uint32_t u32Status ,uint8_t *buf, TCallback cbk, TCallback fail_cbk)
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{
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if (u32Status == 0x08) { /* START has been transmitted */
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I2C_SET_DATA(I2C0, g_u8DeviceAddr << 1); /* Write SLA+W to Register I2CDAT */
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I2C_SET_CONTROL_REG(I2C0, I2C_SI);
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}
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else if (u32Status == 0x18) { /* SLA+W has been transmitted and ACK has been received */
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I2C_SET_DATA(I2C0, g_u8RegAddr);
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I2C_SET_CONTROL_REG(I2C0, I2C_SI);
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}
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else if (u32Status == 0x20) { /* SLA+W has been transmitted and NACK has been received */
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I2C_SET_CONTROL_REG(I2C0, I2C_STO | I2C_SI);
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}
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else if (u32Status == 0x28) { /* DATA has been transmitted and ACK has been received */
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if (g_u8DataLen != g_u8DataLenMax) {
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I2C_SET_DATA(I2C0, buf[g_u8DataLen++]);
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I2C_SET_CONTROL_REG(I2C0, I2C_SI);
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} else {
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I2C_SET_CONTROL_REG(I2C0, I2C_STO | I2C_SI);
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g_u8EndFlag = 1;
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if(cbk != NULL)
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{
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cbk();
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}
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}
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}
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else {
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if(fail_cbk != NULL)
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{
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fail_cbk();
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}
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//I2C_STOP(I2C0);
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//(I2C0)->CTL |= (I2C_CTL_SI_Msk | I2C_CTL_STO_Msk);
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/* TO DO */
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// printf("Status 0x%x is NOT processed\n", u32Status);
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}
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}
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void iic_master_rx(uint32_t u32Status ,uint8_t *buf,TCallback cbk, TCallback fail_cbk){
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if (u32Status == 0x08) { /* START has been transmitted and prepare SLA+W */
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I2C_SET_DATA(I2C0, g_u8DeviceAddr << 1); /* Write SLA+W to Register I2CDAT */
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I2C_SET_CONTROL_REG(I2C0, I2C_SI);
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}
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else if (u32Status == 0x18) { /* SLA+W has been transmitted and ACK has been received */
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I2C_SET_DATA(I2C0, g_u8RegAddr);
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I2C_SET_CONTROL_REG(I2C0, I2C_SI);
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}
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else if (u32Status == 0x20) { /* SLA+W has been transmitted and NACK has been received */
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I2C_SET_CONTROL_REG(I2C0, I2C_STO | I2C_SI);
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}
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else if (u32Status == 0x28) { /* DATA has been transmitted and ACK has been received */
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I2C_SET_CONTROL_REG(I2C0, I2C_STA | I2C_SI);
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}
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else if (u32Status == 0x10) { /* Repeat START has been transmitted and prepare SLA+R */
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I2C_SET_DATA(I2C0, ((g_u8DeviceAddr << 1) | 0x01)); /* Write SLA+R to Register I2CDAT */
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I2C_SET_CONTROL_REG(I2C0, I2C_SI);
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}
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else if (u32Status == 0x40) { /* SLA+R has been transmitted and ACK has been received */
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if(g_u8DataLenMax== 1)
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{
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I2C_SET_CONTROL_REG(I2C0, I2C_SI );
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}
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else{
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I2C_SET_CONTROL_REG(I2C0, I2C_SI | I2C_AA );
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}
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}
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else if (u32Status == 0x50) { /* DATA has been received and ACK has been returned */
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if(g_u8DataLen != g_u8DataLenMax-2){
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buf[g_u8DataLen++] = I2C_GET_DATA(I2C0);
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I2C_SET_CONTROL_REG(I2C0, I2C_SI | I2C_AA);
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}
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else{
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buf[g_u8DataLen++] = I2C_GET_DATA(I2C0);
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I2C_SET_CONTROL_REG(I2C0, I2C_SI );
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}
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}
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else if (u32Status == 0x58) { /* DATA has been received and NACK has been returned */
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buf[g_u8DataLen++] = I2C_GET_DATA(I2C0);
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I2C_SET_CONTROL_REG(I2C0, I2C_STO | I2C_SI);
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g_u8EndFlag = 1;
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if(cbk != NULL)
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{
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cbk();
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}
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}
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else {
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if(fail_cbk != NULL)
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{
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fail_cbk();
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}
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//(I2C0)->CTL |= (I2C_CTL_SI_Msk | I2C_CTL_STO_Msk);
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//I2C_STOP(I2C0);
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/* TO DO */
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//printf("Status 0x%x is NOT processed\n", u32Status);
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}
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}
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void iic_start_send_bytes(uint16_t devAddr,uint8_t regAddr, uint8_t *buf, uint8_t len,TCallback cbk, TCallback fail_cbk)
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{
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I2C0->CTL |= I2C_CTL_I2CEN_Msk;
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I2C0->CTL |= I2C_CTL_INTEN_Msk;
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g_u8DataLenMax = len;
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g_u8DeviceAddr = devAddr;
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g_u8RegAddr = regAddr;
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g_u8DataLen = 0;
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g_u8EndFlag = 0;
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/* I2C function to write data to slave */
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s_I2CHandlerFn = (I2C_FUNC)iic_master_tx;
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cbk_success = cbk;
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cbk_failed = fail_cbk;
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buf_addr = buf;
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/* I2C as master sends START signal */
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I2C_START(I2C0);
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}
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void iic_start_read_bytes(uint16_t devAddr,uint8_t regAddr, uint8_t *buf, uint8_t len,TCallback cbk, TCallback fail_cbk)
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{
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I2C0->CTL |= I2C_CTL_I2CEN_Msk;
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I2C0->CTL |= I2C_CTL_INTEN_Msk;
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g_u8DataLenMax = len;
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g_u8DeviceAddr = devAddr;
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g_u8RegAddr = regAddr;
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g_u8DataLen = 0;
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g_u8EndFlag = 0;
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s_I2CHandlerFn = (I2C_FUNC)iic_master_rx;
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cbk_success = cbk;
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cbk_failed = fail_cbk;
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buf_addr = buf;
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//CLK_SysTickDelay(5000);
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/* I2C as master sends START signal */
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I2C_START(I2C0);
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//while (g_u8EndFlag == 0);
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}
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uint8_t is_iic_busy(void)
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{
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if(g_u8EndFlag){
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return 0;
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}
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else{
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return 1;
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}
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}
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