265 lines
10 KiB
C
265 lines
10 KiB
C
/******************************************************************************
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* @file DAP.h
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* @brief CMSIS-DAP Definitions
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* @version V1.10
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* @date 20. May 2015
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*
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* @note
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* Copyright (C) 2012-2015 ARM Limited. All rights reserved.
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*
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* @par
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* ARM Limited (ARM) is supplying this software for use with Cortex-M
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* processor based microcontrollers.
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*
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* @par
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* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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*
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******************************************************************************/
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#ifndef __DAP_H__
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#define __DAP_H__
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// DAP Command IDs
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#define ID_DAP_Info 0x00U
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#define ID_DAP_HostStatus 0x01U
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#define ID_DAP_Connect 0x02U
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#define ID_DAP_Disconnect 0x03U
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#define ID_DAP_TransferConfigure 0x04U
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#define ID_DAP_Transfer 0x05U
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#define ID_DAP_TransferBlock 0x06U
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#define ID_DAP_TransferAbort 0x07U
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#define ID_DAP_WriteABORT 0x08U
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#define ID_DAP_Delay 0x09U
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#define ID_DAP_ResetTarget 0x0AU
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#define ID_DAP_SWJ_Pins 0x10U
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#define ID_DAP_SWJ_Clock 0x11U
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#define ID_DAP_SWJ_Sequence 0x12U
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#define ID_DAP_SWD_Configure 0x13U
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#define ID_DAP_JTAG_Sequence 0x14U
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#define ID_DAP_JTAG_Configure 0x15U
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#define ID_DAP_JTAG_IDCODE 0x16U
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#define ID_DAP_SWO_Transport 0x17U
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#define ID_DAP_SWO_Mode 0x18U
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#define ID_DAP_SWO_Baudrate 0x19U
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#define ID_DAP_SWO_Control 0x1AU
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#define ID_DAP_SWO_Status 0x1BU
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#define ID_DAP_SWO_Data 0x1CU
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#define ID_DAP_QueueCommands 0x7EU
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#define ID_DAP_ExecuteCommands 0x7FU
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// DAP Vendor Command IDs
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#define ID_DAP_Vendor0 0x80U
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#define ID_DAP_Vendor1 0x81U
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#define ID_DAP_Vendor2 0x82U
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#define ID_DAP_Vendor3 0x83U
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#define ID_DAP_Vendor4 0x84U
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#define ID_DAP_Vendor5 0x85U
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#define ID_DAP_Vendor6 0x86U
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#define ID_DAP_Vendor7 0x87U
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#define ID_DAP_Vendor8 0x88U
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#define ID_DAP_Vendor9 0x89U
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#define ID_DAP_Vendor10 0x8AU
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#define ID_DAP_Vendor11 0x8BU
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#define ID_DAP_Vendor12 0x8CU
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#define ID_DAP_Vendor13 0x8DU
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#define ID_DAP_Vendor14 0x8EU
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#define ID_DAP_Vendor15 0x8FU
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#define ID_DAP_Vendor16 0x90U
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#define ID_DAP_Vendor17 0x91U
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#define ID_DAP_Vendor18 0x92U
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#define ID_DAP_Vendor19 0x93U
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#define ID_DAP_Vendor20 0x94U
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#define ID_DAP_Vendor21 0x95U
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#define ID_DAP_Vendor22 0x96U
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#define ID_DAP_Vendor23 0x97U
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#define ID_DAP_Vendor24 0x98U
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#define ID_DAP_Vendor25 0x99U
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#define ID_DAP_Vendor26 0x9AU
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#define ID_DAP_Vendor27 0x9BU
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#define ID_DAP_Vendor28 0x9CU
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#define ID_DAP_Vendor29 0x9DU
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#define ID_DAP_Vendor30 0x9EU
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#define ID_DAP_Vendor31 0x9FU
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#define ID_DAP_Invalid 0xFFU
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// DAP Status Code
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#define DAP_OK 0U
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#define DAP_ERROR 0xFFU
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// DAP ID
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#define DAP_ID_VENDOR 1U
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#define DAP_ID_PRODUCT 2U
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#define DAP_ID_SER_NUM 3U
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#define DAP_ID_FW_VER 4U
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#define DAP_ID_DEVICE_VENDOR 5U
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#define DAP_ID_DEVICE_NAME 6U
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#define DAP_ID_CAPABILITIES 0xF0U
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#define DAP_ID_SWO_BUFFER_SIZE 0xFDU
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#define DAP_ID_PACKET_COUNT 0xFEU
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#define DAP_ID_PACKET_SIZE 0xFFU
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// DAP Host Status
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#define DAP_DEBUGGER_CONNECTED 0U
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#define DAP_TARGET_RUNNING 1U
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// DAP Port
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#define DAP_PORT_AUTODETECT 0U // Autodetect Port
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#define DAP_PORT_DISABLED 0U // Port Disabled (I/O pins in High-Z)
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#define DAP_PORT_SWD 1U // SWD Port (SWCLK, SWDIO) + nRESET
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#define DAP_PORT_JTAG 2U // JTAG Port (TCK, TMS, TDI, TDO, nTRST) + nRESET
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// DAP SWJ Pins
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#define DAP_SWJ_SWCLK_TCK 0 // SWCLK/TCK
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#define DAP_SWJ_SWDIO_TMS 1 // SWDIO/TMS
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#define DAP_SWJ_TDI 2 // TDI
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#define DAP_SWJ_TDO 3 // TDO
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#define DAP_SWJ_nTRST 5 // nTRST
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#define DAP_SWJ_nRESET 7 // nRESET
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// DAP Transfer Request
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#define DAP_TRANSFER_APnDP (1U<<0)
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#define DAP_TRANSFER_RnW (1U<<1)
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#define DAP_TRANSFER_A2 (1U<<2)
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#define DAP_TRANSFER_A3 (1U<<3)
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#define DAP_TRANSFER_MATCH_VALUE (1U<<4)
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#define DAP_TRANSFER_MATCH_MASK (1U<<5)
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// DAP Transfer Response
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#define DAP_TRANSFER_OK (1U<<0)
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#define DAP_TRANSFER_WAIT (1U<<1)
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#define DAP_TRANSFER_FAULT (1U<<2)
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#define DAP_TRANSFER_ERROR (1U<<3)
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#define DAP_TRANSFER_MISMATCH (1U<<4)
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// DAP SWO Trace Mode
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#define DAP_SWO_OFF 0U
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#define DAP_SWO_UART 1U
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#define DAP_SWO_MANCHESTER 2U
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// DAP SWO Trace Status
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#define DAP_SWO_CAPTURE_ACTIVE (1U<<0)
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#define DAP_SWO_CAPTURE_PAUSED (1U<<1)
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#define DAP_SWO_STREAM_ERROR (1U<<6)
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#define DAP_SWO_BUFFER_OVERRUN (1U<<7)
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// Debug Port Register Addresses
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#define DP_IDCODE 0x00U // IDCODE Register (SW Read only)
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#define DP_ABORT 0x00U // Abort Register (SW Write only)
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#define DP_CTRL_STAT 0x04U // Control & Status
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#define DP_WCR 0x04U // Wire Control Register (SW Only)
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#define DP_SELECT 0x08U // Select Register (JTAG R/W & SW W)
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#define DP_RESEND 0x08U // Resend (SW Read Only)
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#define DP_RDBUFF 0x0CU // Read Buffer (Read Only)
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// JTAG IR Codes
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#define JTAG_ABORT 0x08U
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#define JTAG_DPACC 0x0AU
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#define JTAG_APACC 0x0BU
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#define JTAG_IDCODE 0x0EU
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#define JTAG_BYPASS 0x0FU
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// JTAG Sequence Info
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#define JTAG_SEQUENCE_TCK 0x3FU // TCK count
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#define JTAG_SEQUENCE_TMS 0x40U // TMS value
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#define JTAG_SEQUENCE_TDO 0x80U // TDO capture
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#include <stddef.h>
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#include <stdint.h>
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// DAP Data structure
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typedef struct {
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uint8_t debug_port; // Debug Port
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uint8_t fast_clock; // Fast Clock Flag
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uint32_t clock_delay; // Clock Delay
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struct { // Transfer Configuration
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uint8_t idle_cycles; // Idle cycles after transfer
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uint16_t retry_count; // Number of retries after WAIT response
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uint16_t match_retry; // Number of retries if read value does not match
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uint32_t match_mask; // Match Mask
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} transfer;
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#if (DAP_SWD != 0)
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struct { // SWD Configuration
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uint8_t turnaround; // Turnaround period
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uint8_t data_phase; // Always generate Data Phase
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} swd_conf;
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#endif
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#if (DAP_JTAG != 0)
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struct { // JTAG Device Chain
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uint8_t count; // Number of devices
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uint8_t index; // Device index (device at TDO has index 0)
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#if (DAP_JTAG_DEV_CNT != 0)
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uint8_t ir_length[DAP_JTAG_DEV_CNT]; // IR Length in bits
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uint16_t ir_before[DAP_JTAG_DEV_CNT]; // Bits before IR
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uint16_t ir_after [DAP_JTAG_DEV_CNT]; // Bits after IR
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#endif
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} jtag_dev;
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#endif
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} DAP_Data_t;
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extern DAP_Data_t DAP_Data; // DAP Data
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extern volatile uint8_t DAP_TransferAbort; // Transfer Abort Flag
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// Functions
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extern void SWJ_Sequence (uint32_t count, const uint8_t *data);
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extern void JTAG_Sequence (uint32_t info, const uint8_t *tdi, uint8_t *tdo);
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extern void JTAG_IR (uint32_t ir);
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extern uint32_t JTAG_ReadIDCode (void);
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extern void JTAG_WriteAbort (uint32_t data);
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extern uint8_t JTAG_Transfer (uint32_t request, uint32_t *data);
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extern uint8_t SWD_Transfer (uint32_t request, uint32_t *data);
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extern void Delayms (uint32_t delay);
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extern uint32_t SWO_Transport (const uint8_t *request, uint8_t *response);
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extern uint32_t SWO_Mode (const uint8_t *request, uint8_t *response);
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extern uint32_t SWO_Baudrate (const uint8_t *request, uint8_t *response);
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extern uint32_t SWO_Control (const uint8_t *request, uint8_t *response);
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extern uint32_t SWO_Status (uint8_t *response);
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extern uint32_t SWO_Data (const uint8_t *request, uint8_t *response);
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extern uint32_t DAP_ProcessVendorCommand (const uint8_t *request, uint8_t *response);
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extern uint32_t DAP_ProcessCommand (const uint8_t *request, uint8_t *response);
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extern uint32_t DAP_ExecuteCommand (const uint8_t *request, uint8_t *response);
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extern void DAP_Setup (void);
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// Configurable delay for clock generation
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#ifndef DELAY_SLOW_CYCLES
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#define DELAY_SLOW_CYCLES 3U // Number of cycles for one iteration
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#endif
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static __forceinline void PIN_DELAY_SLOW (uint32_t delay) {
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uint32_t count;
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count = delay;
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while (--count);
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}
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// Fixed delay for fast clock generation
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#ifndef DELAY_FAST_CYCLES
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#define DELAY_FAST_CYCLES 0U // Number of cycles: 0..3
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#endif
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static __forceinline void PIN_DELAY_FAST (void) {
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#if (DELAY_FAST_CYCLES >= 1U)
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__nop();
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#endif
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#if (DELAY_FAST_CYCLES >= 2U)
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__nop();
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#endif
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#if (DELAY_FAST_CYCLES >= 3U)
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__nop();
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#endif
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}
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#endif /* __DAP_H__ */
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