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ChipTest/PAN159/PAN159-Template/SampleCode/Template/Keil/obj/template.txt
SXHome 7fd213ef33 添加PAN159资料
2021-09-26 17:19:12 +08:00

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========================================================================
** ELF Header Information
File Name: .\obj\template.axf
Machine class: ELFCLASS32 (32-bit)
Data encoding: ELFDATA2LSB (Little endian)
Header version: EV_CURRENT (Current version)
Operating System ABI: none
ABI Version: 0
File Type: ET_EXEC (Executable) (2)
Machine: EM_ARM (ARM)
Image Entry point: 0x00000241
Flags: EF_ARM_HASENTRY + EF_ARM_ABI_FLOAT_SOFT (0x05000202)
ARM ELF revision: 5 (ABI version 2)
Conforms to Soft float procedure-call standard
Built with
Component: ARM Compiler 5.06 update 4 (build 422) Tool: armasm [4d35cf]
Component: ARM Compiler 5.06 update 4 (build 422) Tool: armlink [4d35d2]
Header size: 52 bytes (0x34)
Program header entry size: 32 bytes (0x20)
Section header entry size: 40 bytes (0x28)
Program header entries: 1
Section header entries: 16
Program header offset: 462072 (0x00070cf8)
Section header offset: 462104 (0x00070d18)
Section header string table index: 15
========================================================================
** Program header #0 (PT_LOAD) [PF_X + PF_W + PF_R + PF_ARM_ENTRY]
Size : 6528 bytes (5920 bytes in file)
Virtual address: 0x00000000 (Alignment 8)
========================================================================
** Section #1 'ER_RO' (SHT_PROGBITS) [SHF_ALLOC + SHF_EXECINSTR]
Size : 5896 bytes (alignment 4)
Address: 0x00000000
$d.realdata
RESET
__Vectors
0x00000000: 20000278 x.. DCD 536871544
0x00000004: 00000241 A... DCD 577
0x00000008: 00000245 E... DCD 581
0x0000000c: 0000017d }... DCD 381
0x00000010: 00000000 .... DCD 0
0x00000014: 00000000 .... DCD 0
0x00000018: 00000000 .... DCD 0
0x0000001c: 00000000 .... DCD 0
0x00000020: 00000000 .... DCD 0
0x00000024: 00000000 .... DCD 0
0x00000028: 00000000 .... DCD 0
0x0000002c: 00000249 I... DCD 585
0x00000030: 00000000 .... DCD 0
0x00000034: 00000000 .... DCD 0
0x00000038: 0000024b K... DCD 587
0x0000003c: 0000024d M... DCD 589
0x00000040: 0000024f O... DCD 591
0x00000044: 0000024f O... DCD 591
0x00000048: 0000024f O... DCD 591
0x0000004c: 0000024f O... DCD 591
0x00000050: 0000024f O... DCD 591
0x00000054: 0000024f O... DCD 591
0x00000058: 0000024f O... DCD 591
0x0000005c: 0000024f O... DCD 591
0x00000060: 0000024f O... DCD 591
0x00000064: 0000024f O... DCD 591
0x00000068: 0000024f O... DCD 591
0x0000006c: 0000024f O... DCD 591
0x00000070: 0000024f O... DCD 591
0x00000074: 0000024f O... DCD 591
0x00000078: 0000024f O... DCD 591
0x0000007c: 0000024f O... DCD 591
0x00000080: 0000024f O... DCD 591
0x00000084: 0000024f O... DCD 591
0x00000088: 0000024f O... DCD 591
0x0000008c: 0000024f O... DCD 591
0x00000090: 0000024f O... DCD 591
0x00000094: 0000024f O... DCD 591
0x00000098: 0000024f O... DCD 591
0x0000009c: 0000024f O... DCD 591
0x000000a0: 0000024f O... DCD 591
0x000000a4: 0000024f O... DCD 591
0x000000a8: 0000024f O... DCD 591
0x000000ac: 0000024f O... DCD 591
0x000000b0: 0000024f O... DCD 591
0x000000b4: 00000f59 Y... DCD 3929
0x000000b8: 0000024f O... DCD 591
0x000000bc: 0000024f O... DCD 591
$t
!!!main
__main
0x000000c0: f000f802 .... BL __scatterload ; 0xc8
0x000000c4: f000f84b ..K. BL __rt_entry ; 0x15e
!!!scatter
__scatterload
__scatterload_rt2
__scatterload_rt2_thumb_only
0x000000c8: a00c .. ADR r0,{pc}+0x34 ; 0xfc
0x000000ca: c830 0. LDM r0!,{r4,r5}
0x000000cc: 3808 .8 SUBS r0,r0,#8
0x000000ce: 1824 $. ADDS r4,r4,r0
0x000000d0: 182d -. ADDS r5,r5,r0
0x000000d2: 46a2 .F MOV r10,r4
0x000000d4: 1e67 g. SUBS r7,r4,#1
0x000000d6: 46ab .F MOV r11,r5
__scatterload_null
0x000000d8: 4654 TF MOV r4,r10
0x000000da: 465d ]F MOV r5,r11
0x000000dc: 42ac .B CMP r4,r5
0x000000de: d101 .. BNE 0xe4 ; __scatterload_null + 12
0x000000e0: f000f83d ..=. BL __rt_entry ; 0x15e
0x000000e4: 467e ~F MOV r6,pc
0x000000e6: 3e0f .> SUBS r6,r6,#0xf
0x000000e8: cc0f .. LDM r4!,{r0-r3}
0x000000ea: 46b6 .F MOV lr,r6
0x000000ec: 2601 .& MOVS r6,#1
0x000000ee: 4233 3B TST r3,r6
0x000000f0: d000 .. BEQ 0xf4 ; __scatterload_null + 28
0x000000f2: 1afb .. SUBS r3,r7,r3
0x000000f4: 46a2 .F MOV r10,r4
0x000000f6: 46ab .F MOV r11,r5
0x000000f8: 4333 3C ORRS r3,r3,r6
0x000000fa: 4718 .G BX r3
$d
0x000000fc: 000015ec .... DCD 5612
0x00000100: 0000160c .... DCD 5644
$t
!!handler_copy
__scatterload_copy
0x00000104: 3a10 .: SUBS r2,r2,#0x10
0x00000106: d302 .. BCC 0x10e ; __scatterload_copy + 10
0x00000108: c878 x. LDM r0!,{r3-r6}
0x0000010a: c178 x. STM r1!,{r3-r6}
0x0000010c: d8fa .. BHI __scatterload_copy ; 0x104
0x0000010e: 0752 R. LSLS r2,r2,#29
0x00000110: d301 .. BCC 0x116 ; __scatterload_copy + 18
0x00000112: c830 0. LDM r0!,{r4,r5}
0x00000114: c130 0. STM r1!,{r4,r5}
0x00000116: d501 .. BPL 0x11c ; __scatterload_copy + 24
0x00000118: 6804 .h LDR r4,[r0,#0]
0x0000011a: 600c .` STR r4,[r1,#0]
0x0000011c: 4770 pG BX lr
0x0000011e: 0000 .. MOVS r0,r0
!!handler_zi
__scatterload_zeroinit
0x00000120: 2300 .# MOVS r3,#0
0x00000122: 2400 .$ MOVS r4,#0
0x00000124: 2500 .% MOVS r5,#0
0x00000126: 2600 .& MOVS r6,#0
0x00000128: 3a10 .: SUBS r2,r2,#0x10
0x0000012a: d301 .. BCC 0x130 ; __scatterload_zeroinit + 16
0x0000012c: c178 x. STM r1!,{r3-r6}
0x0000012e: d8fb .. BHI 0x128 ; __scatterload_zeroinit + 8
0x00000130: 0752 R. LSLS r2,r2,#29
0x00000132: d300 .. BCC 0x136 ; __scatterload_zeroinit + 22
0x00000134: c130 0. STM r1!,{r4,r5}
0x00000136: d500 .. BPL 0x13a ; __scatterload_zeroinit + 26
0x00000138: 600b .` STR r3,[r1,#0]
0x0000013a: 4770 pG BX lr
.ARM.Collect$$_printf_percent$$00000000
_printf_percent
0x0000013c: b510 .. PUSH {r4,lr}
.ARM.Collect$$_printf_percent$$00000009
_printf_d
0x0000013e: 2964 d) CMP r1,#0x64
0x00000140: d102 .. BNE _printf_x ; 0x148
0x00000142: f001f851 ..Q. BL _printf_int_dec ; 0x11e8
0x00000146: bd10 .. POP {r4,pc}
.ARM.Collect$$_printf_percent$$0000000C
_printf_x
0x00000148: 2978 x) CMP r1,#0x78
0x0000014a: d102 .. BNE _printf_percent_end ; 0x152
0x0000014c: f001f882 .... BL _printf_int_hex ; 0x1254
0x00000150: bd10 .. POP {r4,pc}
.ARM.Collect$$_printf_percent$$00000017
_printf_percent_end
0x00000152: 2000 . MOVS r0,#0
0x00000154: bd10 .. POP {r4,pc}
.ARM.Collect$$libinit$$00000000
__rt_lib_init
0x00000156: b51f .. PUSH {r0-r4,lr}
.ARM.Collect$$libinit$$00000002
.ARM.Collect$$libinit$$00000004
.ARM.Collect$$libinit$$0000000A
.ARM.Collect$$libinit$$0000000C
.ARM.Collect$$libinit$$0000000E
.ARM.Collect$$libinit$$00000011
.ARM.Collect$$libinit$$00000013
.ARM.Collect$$libinit$$00000015
.ARM.Collect$$libinit$$00000017
.ARM.Collect$$libinit$$00000019
.ARM.Collect$$libinit$$0000001B
.ARM.Collect$$libinit$$0000001D
.ARM.Collect$$libinit$$0000001F
.ARM.Collect$$libinit$$00000021
.ARM.Collect$$libinit$$00000023
.ARM.Collect$$libinit$$00000025
.ARM.Collect$$libinit$$0000002C
.ARM.Collect$$libinit$$0000002E
.ARM.Collect$$libinit$$00000030
.ARM.Collect$$libinit$$00000032
.ARM.Collect$$libinit$$00000033
__rt_lib_init_alloca_1
__rt_lib_init_argv_1
__rt_lib_init_atexit_1
__rt_lib_init_clock_1
__rt_lib_init_cpp_1
__rt_lib_init_exceptions_1
__rt_lib_init_fp_1
__rt_lib_init_fp_trap_1
__rt_lib_init_getenv_1
__rt_lib_init_heap_1
__rt_lib_init_lc_collate_1
__rt_lib_init_lc_ctype_1
__rt_lib_init_lc_monetary_1
__rt_lib_init_lc_numeric_1
__rt_lib_init_lc_time_1
__rt_lib_init_preinit_1
__rt_lib_init_rand_1
__rt_lib_init_return
__rt_lib_init_signal_1
__rt_lib_init_stdio_1
__rt_lib_init_user_alloc_1
0x00000158: bd1f .. POP {r0-r4,pc}
.ARM.Collect$$libshutdown$$00000000
__rt_lib_shutdown
0x0000015a: b510 .. PUSH {r4,lr}
.ARM.Collect$$libshutdown$$00000002
.ARM.Collect$$libshutdown$$00000004
.ARM.Collect$$libshutdown$$00000007
.ARM.Collect$$libshutdown$$0000000A
.ARM.Collect$$libshutdown$$0000000C
.ARM.Collect$$libshutdown$$0000000F
.ARM.Collect$$libshutdown$$00000010
__rt_lib_shutdown_cpp_1
__rt_lib_shutdown_fp_trap_1
__rt_lib_shutdown_heap_1
__rt_lib_shutdown_return
__rt_lib_shutdown_signal_1
__rt_lib_shutdown_stdio_1
__rt_lib_shutdown_user_alloc_1
0x0000015c: bd10 .. POP {r4,pc}
.ARM.Collect$$rtentry$$00000000
.ARM.Collect$$rtentry$$00000002
.ARM.Collect$$rtentry$$00000004
__rt_entry
__rt_entry_presh_1
__rt_entry_sh
0x0000015e: f001fa75 ..u. BL __user_setup_stackheap ; 0x164c
0x00000162: 4611 .F MOV r1,r2
.ARM.Collect$$rtentry$$00000009
.ARM.Collect$$rtentry$$0000000A
__rt_entry_li
__rt_entry_postsh_1
0x00000164: f7fffff7 .... BL __rt_lib_init ; 0x156
.ARM.Collect$$rtentry$$0000000C
.ARM.Collect$$rtentry$$0000000D
__rt_entry_main
__rt_entry_postli_1
0x00000168: f000ff6f ..o. BL main ; 0x104a
0x0000016c: f001fa8d .... BL exit ; 0x168a
.ARM.Collect$$rtexit$$00000000
__rt_exit
0x00000170: b403 .. PUSH {r0,r1}
.ARM.Collect$$rtexit$$00000002
.ARM.Collect$$rtexit$$00000003
__rt_exit_ls
__rt_exit_prels_1
0x00000172: f7fffff2 .... BL __rt_lib_shutdown ; 0x15a
.ARM.Collect$$rtexit$$00000004
__rt_exit_exit
0x00000176: bc03 .. POP {r0,r1}
0x00000178: f001fa94 .... BL _sys_exit ; 0x16a4
.emb_text
HardFault_Handler
0x0000017c: 2004 . MOVS r0,#4
0x0000017e: 4671 qF MOV r1,lr
0x00000180: 4208 .B TST r0,r1
0x00000182: d002 .. BEQ 0x18a ; HardFault_Handler + 14
0x00000184: f3ef8009 .... MRS r0,PSP
0x00000188: e001 .. B 0x18e ; HardFault_Handler + 18
0x0000018a: f3ef8008 .... MRS r0,MSP
0x0000018e: 4671 qF MOV r1,lr
0x00000190: 4a00 .J LDR r2,[pc,#0] ; [0x194] = 0x2b3
0x00000192: 4710 .G BX r2
$d
0x00000194: 000002b3 .... DCD 691
$t
.text
SystemInit
0x00000198: 4770 pG BX lr
SystemCoreClockUpdate
0x0000019a: b5f8 .. PUSH {r3-r7,lr}
0x0000019c: a021 !. ADR r0,{pc}+0x88 ; 0x224
0x0000019e: 6800 .h LDR r0,[r0,#0]
0x000001a0: 4e21 !N LDR r6,[pc,#132] ; [0x228] = 0x50000200
0x000001a2: 9000 .. STR r0,[sp,#0]
0x000001a4: 6a31 1j LDR r1,[r6,#0x20]
0x000001a6: 1330 0. ASRS r0,r6,#12
0x000001a8: 4c20 L LDR r4,[pc,#128] ; [0x22c] = 0x1518000
0x000001aa: 4d21 !M LDR r5,[pc,#132] ; [0x230] = 0xb71b00
0x000001ac: 4201 .B TST r1,r0
0x000001ae: d001 .. BEQ 0x1b4 ; SystemCoreClockUpdate + 26
0x000001b0: 2100 .! MOVS r1,#0
0x000001b2: e018 .. B 0x1e6 ; SystemCoreClockUpdate + 76
0x000001b4: 0308 .. LSLS r0,r1,#12
0x000001b6: d501 .. BPL 0x1bc ; SystemCoreClockUpdate + 34
0x000001b8: 4620 F MOV r0,r4
0x000001ba: e000 .. B 0x1be ; SystemCoreClockUpdate + 36
0x000001bc: 4628 (F MOV r0,r5
0x000001be: 038a .. LSLS r2,r1,#14
0x000001c0: d501 .. BPL 0x1c6 ; SystemCoreClockUpdate + 44
0x000001c2: 4601 .F MOV r1,r0
0x000001c4: e00f .. B 0x1e6 ; SystemCoreClockUpdate + 76
0x000001c6: 040a .. LSLS r2,r1,#16
0x000001c8: 0f92 .. LSRS r2,r2,#30
0x000001ca: 466b kF MOV r3,sp
0x000001cc: 5c9a .\ LDRB r2,[r3,r2]
0x000001ce: 05cb .. LSLS r3,r1,#23
0x000001d0: 0489 .. LSLS r1,r1,#18
0x000001d2: 0ddb .. LSRS r3,r3,#23
0x000001d4: 0ec9 .. LSRS r1,r1,#27
0x000001d6: 1c89 .. ADDS r1,r1,#2
0x000001d8: 0880 .. LSRS r0,r0,#2
0x000001da: 1c9b .. ADDS r3,r3,#2
0x000001dc: 4351 QC MULS r1,r2,r1
0x000001de: 4358 XC MULS r0,r3,r0
0x000001e0: f001f8eb .... BL __aeabi_uidiv ; 0x13ba
0x000001e4: 0081 .. LSLS r1,r0,#2
0x000001e6: 4f13 .O LDR r7,[pc,#76] ; [0x234] = 0x20000004
0x000001e8: 6039 9` STR r1,[r7,#0]
0x000001ea: 6930 0i LDR r0,[r6,#0x10]
0x000001ec: 0740 @. LSLS r0,r0,#29
0x000001ee: 0f40 @. LSRS r0,r0,#29
0x000001f0: d012 .. BEQ 0x218 ; SystemCoreClockUpdate + 126
0x000001f2: 2802 .( CMP r0,#2
0x000001f4: d012 .. BEQ 0x21c ; SystemCoreClockUpdate + 130
0x000001f6: 2803 .( CMP r0,#3
0x000001f8: d012 .. BEQ 0x220 ; SystemCoreClockUpdate + 134
0x000001fa: 4620 F MOV r0,r4
0x000001fc: 69b1 .i LDR r1,[r6,#0x18]
0x000001fe: 0709 .. LSLS r1,r1,#28
0x00000200: 0f09 .. LSRS r1,r1,#28
0x00000202: 1c49 I. ADDS r1,r1,#1
0x00000204: f001f8d9 .... BL __aeabi_uidiv ; 0x13ba
0x00000208: 490b .I LDR r1,[pc,#44] ; [0x238] = 0xf4240
0x0000020a: 6078 x` STR r0,[r7,#4]
0x0000020c: 104a J. ASRS r2,r1,#1
0x0000020e: 1880 .. ADDS r0,r0,r2
0x00000210: f001f8d3 .... BL __aeabi_uidiv ; 0x13ba
0x00000214: 60b8 .` STR r0,[r7,#8]
0x00000216: bdf8 .. POP {r3-r7,pc}
0x00000218: 4628 (F MOV r0,r5
0x0000021a: e7ef .. B 0x1fc ; SystemCoreClockUpdate + 98
0x0000021c: 4608 .F MOV r0,r1
0x0000021e: e7ed .. B 0x1fc ; SystemCoreClockUpdate + 98
0x00000220: 4806 .H LDR r0,[pc,#24] ; [0x23c] = 0x2710
0x00000222: e7eb .. B 0x1fc ; SystemCoreClockUpdate + 98
$d
0x00000224: 04020201 .... DCD 67240449
0x00000228: 50000200 ...P DCD 1342177792
0x0000022c: 01518000 ..Q. DCD 22118400
0x00000230: 00b71b00 .... DCD 12000000
0x00000234: 20000004 ... DCD 536870916
0x00000238: 000f4240 @B.. DCD 1000000
0x0000023c: 00002710 .'.. DCD 10000
$t
.text
Reset_Handler
0x00000240: 4806 .H LDR r0,[pc,#24] ; [0x25c] = 0xc1
0x00000242: 4700 .G BX r0
NMI_Handler
0x00000244: e7fe .. B NMI_Handler ; 0x244
0x00000246: e7fe .. B 0x246 ; NMI_Handler + 2
SVC_Handler
0x00000248: e7fe .. B SVC_Handler ; 0x248
PendSV_Handler
0x0000024a: e7fe .. B PendSV_Handler ; 0x24a
SysTick_Handler
0x0000024c: e7fe .. B SysTick_Handler ; 0x24c
Default_Handler
ACMP_IRQHandler
BOD_IRQHandler
EINT0_IRQHandler
EINT1_IRQHandler
FB_IRQHandler
GPIO01_IRQHandler
GPIO234_IRQHandler
GPIO5_IRQHandler
HIRC_IRQHandler
I2C0_IRQHandler
I2C1_IRQHandler
PDWU_IRQHandler
PWM_IRQHandler
SPI_IRQHandler
TMR0_IRQHandler
TMR1_IRQHandler
UART0_IRQHandler
UART1_IRQHandler
WDT_IRQHandler
0x0000024e: e7fe .. B Default_Handler ; 0x24e
__user_initial_stackheap
0x00000250: 4803 .H LDR r0,[pc,#12] ; [0x260] = 0x20000078
0x00000252: 4904 .I LDR r1,[pc,#16] ; [0x264] = 0x20000278
0x00000254: 4a02 .J LDR r2,[pc,#8] ; [0x260] = 0x20000078
0x00000256: 4b04 .K LDR r3,[pc,#16] ; [0x268] = 0x20000078
0x00000258: 4770 pG BX lr
$d
0x0000025a: 0000 .. DCW 0
0x0000025c: 000000c1 .... DCD 193
0x00000260: 20000078 x.. DCD 536871032
0x00000264: 20000278 x.. DCD 536871544
0x00000268: 20000078 x.. DCD 536871032
$t
.text
stackDump
0x0000026c: b510 .. PUSH {r4,lr}
0x0000026e: 4604 .F MOV r4,r0
0x00000270: 6801 .h LDR r1,[r0,#0]
0x00000272: a029 ). ADR r0,{pc}+0xa6 ; 0x318
0x00000274: f000ffaa .... BL __2printf ; 0x11cc
0x00000278: a02a *. ADR r0,{pc}+0xac ; 0x324
0x0000027a: 6861 ah LDR r1,[r4,#4]
0x0000027c: f000ffa6 .... BL __2printf ; 0x11cc
0x00000280: a02b +. ADR r0,{pc}+0xb0 ; 0x330
0x00000282: 68a1 .h LDR r1,[r4,#8]
0x00000284: f000ffa2 .... BL __2printf ; 0x11cc
0x00000288: a02c ,. ADR r0,{pc}+0xb4 ; 0x33c
0x0000028a: 68e1 .h LDR r1,[r4,#0xc]
0x0000028c: f000ff9e .... BL __2printf ; 0x11cc
0x00000290: a02d -. ADR r0,{pc}+0xb8 ; 0x348
0x00000292: 6921 !i LDR r1,[r4,#0x10]
0x00000294: f000ff9a .... BL __2printf ; 0x11cc
0x00000298: a02e .. ADR r0,{pc}+0xbc ; 0x354
0x0000029a: 6961 ai LDR r1,[r4,#0x14]
0x0000029c: f000ff96 .... BL __2printf ; 0x11cc
0x000002a0: a02f /. ADR r0,{pc}+0xc0 ; 0x360
0x000002a2: 69a1 .i LDR r1,[r4,#0x18]
0x000002a4: f000ff92 .... BL __2printf ; 0x11cc
0x000002a8: a030 0. ADR r0,{pc}+0xc4 ; 0x36c
0x000002aa: 69e1 .i LDR r1,[r4,#0x1c]
0x000002ac: f000ff8e .... BL __2printf ; 0x11cc
0x000002b0: bd10 .. POP {r4,pc}
Hard_Fault_Handler
__tagsym$$used
0x000002b2: 4604 .F MOV r4,r0
0x000002b4: a030 0. ADR r0,{pc}+0xc4 ; 0x378
0x000002b6: f000ff89 .... BL __2printf ; 0x11cc
0x000002ba: 4620 F MOV r0,r4
0x000002bc: f7ffffd6 .... BL stackDump ; 0x26c
0x000002c0: e7fe .. B 0x2c0 ; Hard_Fault_Handler + 14
SendChar_ToUART
0x000002c2: 4933 3I LDR r1,[pc,#204] ; [0x390] = 0x40050000
0x000002c4: 698a .i LDR r2,[r1,#0x18]
0x000002c6: 0212 .. LSLS r2,r2,#8
0x000002c8: d4fc .. BMI 0x2c4 ; SendChar_ToUART + 2
0x000002ca: 6008 .` STR r0,[r1,#0]
0x000002cc: 280a .( CMP r0,#0xa
0x000002ce: d104 .. BNE 0x2da ; SendChar_ToUART + 24
0x000002d0: 6988 .i LDR r0,[r1,#0x18]
0x000002d2: 0200 .. LSLS r0,r0,#8
0x000002d4: d4fc .. BMI 0x2d0 ; SendChar_ToUART + 14
0x000002d6: 200d . MOVS r0,#0xd
0x000002d8: 6008 .` STR r0,[r1,#0]
0x000002da: 4770 pG BX lr
SendChar
0x000002dc: e7f1 .. B SendChar_ToUART ; 0x2c2
GetChar
0x000002de: 482c ,H LDR r0,[pc,#176] ; [0x390] = 0x40050000
0x000002e0: 6981 .i LDR r1,[r0,#0x18]
0x000002e2: 0449 I. LSLS r1,r1,#17
0x000002e4: d4fc .. BMI 0x2e0 ; GetChar + 2
0x000002e6: 6800 .h LDR r0,[r0,#0]
0x000002e8: b2c0 .. UXTB r0,r0
0x000002ea: 4770 pG BX lr
kbhit
0x000002ec: 4828 (H LDR r0,[pc,#160] ; [0x390] = 0x40050000
0x000002ee: 6980 .i LDR r0,[r0,#0x18]
0x000002f0: 0440 @. LSLS r0,r0,#17
0x000002f2: 17c0 .. ASRS r0,r0,#31
0x000002f4: 1c40 @. ADDS r0,r0,#1
0x000002f6: 4770 pG BX lr
IsDebugFifoEmpty
0x000002f8: 4825 %H LDR r0,[pc,#148] ; [0x390] = 0x40050000
0x000002fa: 6980 .i LDR r0,[r0,#0x18]
0x000002fc: 00c0 .. LSLS r0,r0,#3
0x000002fe: 0fc0 .. LSRS r0,r0,#31
0x00000300: 4770 pG BX lr
_ttywrch
0x00000302: e7de .. B SendChar_ToUART ; 0x2c2
fputc
0x00000304: b500 .. PUSH {lr}
0x00000306: 4603 .F MOV r3,r0
0x00000308: f7ffffdb .... BL SendChar_ToUART ; 0x2c2
0x0000030c: 4618 .F MOV r0,r3
0x0000030e: bd00 .. POP {pc}
fgetc
0x00000310: e7e5 .. B GetChar ; 0x2de
ferror
0x00000312: 2000 . MOVS r0,#0
0x00000314: 43c0 .C MVNS r0,r0
0x00000316: 4770 pG BX lr
$d
0x00000318: 20203072 r0 DCD 538980466
0x0000031c: 7830203d = 0x DCD 2016419901
0x00000320: 000a7825 %x.. DCD 686117
0x00000324: 20203172 r1 DCD 538980722
0x00000328: 7830203d = 0x DCD 2016419901
0x0000032c: 000a7825 %x.. DCD 686117
0x00000330: 20203272 r2 DCD 538980978
0x00000334: 7830203d = 0x DCD 2016419901
0x00000338: 000a7825 %x.. DCD 686117
0x0000033c: 20203372 r3 DCD 538981234
0x00000340: 7830203d = 0x DCD 2016419901
0x00000344: 000a7825 %x.. DCD 686117
0x00000348: 20323172 r12 DCD 540160370
0x0000034c: 7830203d = 0x DCD 2016419901
0x00000350: 000a7825 %x.. DCD 686117
0x00000354: 2020726c lr DCD 538997356
0x00000358: 7830203d = 0x DCD 2016419901
0x0000035c: 000a7825 %x.. DCD 686117
0x00000360: 20206370 pc DCD 538993520
0x00000364: 7830203d = 0x DCD 2016419901
0x00000368: 000a7825 %x.. DCD 686117
0x0000036c: 20727370 psr DCD 544371568
0x00000370: 7830203d = 0x DCD 2016419901
0x00000374: 000a7825 %x.. DCD 686117
0x00000378: 48206e49 In H DCD 1210084937
0x0000037c: 20647261 ard DCD 543453793
0x00000380: 6c756146 Faul DCD 1819631942
0x00000384: 61482074 t Ha DCD 1632116852
0x00000388: 656c646e ndle DCD 1701602414
0x0000038c: 00000a72 r... DCD 2674
0x00000390: 40050000 ...@ DCD 1074069504
$t
.text
CLK_GetPLLClockFreq
0x00000394: b508 .. PUSH {r3,lr}
0x00000396: a0a2 .. ADR r0,{pc}+0x28a ; 0x620
0x00000398: 6800 .h LDR r0,[r0,#0]
0x0000039a: 9000 .. STR r0,[sp,#0]
0x0000039c: 48a1 .H LDR r0,[pc,#644] ; [0x624] = 0x50000200
0x0000039e: 6a01 .j LDR r1,[r0,#0x20]
0x000003a0: 1300 .. ASRS r0,r0,#12
0x000003a2: 4201 .B TST r1,r0
0x000003a4: d001 .. BEQ 0x3aa ; CLK_GetPLLClockFreq + 22
0x000003a6: 2000 . MOVS r0,#0
0x000003a8: bd08 .. POP {r3,pc}
0x000003aa: 0308 .. LSLS r0,r1,#12
0x000003ac: d501 .. BPL 0x3b2 ; CLK_GetPLLClockFreq + 30
0x000003ae: 489e .H LDR r0,[pc,#632] ; [0x628] = 0x1518000
0x000003b0: e000 .. B 0x3b4 ; CLK_GetPLLClockFreq + 32
0x000003b2: 489e .H LDR r0,[pc,#632] ; [0x62c] = 0xb71b00
0x000003b4: 038a .. LSLS r2,r1,#14
0x000003b6: d4f7 .. BMI 0x3a8 ; CLK_GetPLLClockFreq + 20
0x000003b8: 040a .. LSLS r2,r1,#16
0x000003ba: 0f92 .. LSRS r2,r2,#30
0x000003bc: 466b kF MOV r3,sp
0x000003be: 5c9b .\ LDRB r3,[r3,r2]
0x000003c0: 05ca .. LSLS r2,r1,#23
0x000003c2: 0489 .. LSLS r1,r1,#18
0x000003c4: 0dd2 .. LSRS r2,r2,#23
0x000003c6: 0ec9 .. LSRS r1,r1,#27
0x000003c8: 1c89 .. ADDS r1,r1,#2
0x000003ca: 0880 .. LSRS r0,r0,#2
0x000003cc: 1c92 .. ADDS r2,r2,#2
0x000003ce: 4359 YC MULS r1,r3,r1
0x000003d0: 4350 PC MULS r0,r2,r0
0x000003d2: f000fff2 .... BL __aeabi_uidiv ; 0x13ba
0x000003d6: 0080 .. LSLS r0,r0,#2
0x000003d8: bd08 .. POP {r3,pc}
UART_ClearIntFlag
0x000003da: 054a J. LSLS r2,r1,#21
0x000003dc: d503 .. BPL 0x3e6 ; UART_ClearIntFlag + 12
0x000003de: 2260 `" MOVS r2,#0x60
0x000003e0: 6182 .a STR r2,[r0,#0x18]
0x000003e2: 2208 ." MOVS r2,#8
0x000003e4: 6182 .a STR r2,[r0,#0x18]
0x000003e6: 050a .. LSLS r2,r1,#20
0x000003e8: d501 .. BPL 0x3ee ; UART_ClearIntFlag + 20
0x000003ea: 2201 ." MOVS r2,#1
0x000003ec: 6142 Ba STR r2,[r0,#0x14]
0x000003ee: 048a .. LSLS r2,r1,#18
0x000003f0: d501 .. BPL 0x3f6 ; UART_ClearIntFlag + 28
0x000003f2: 4a8f .J LDR r2,[pc,#572] ; [0x630] = 0x1000001
0x000003f4: 6182 .a STR r2,[r0,#0x18]
0x000003f6: 04c9 .. LSLS r1,r1,#19
0x000003f8: d501 .. BPL 0x3fe ; UART_ClearIntFlag + 36
0x000003fa: 2110 .! MOVS r1,#0x10
0x000003fc: 61c1 .a STR r1,[r0,#0x1c]
0x000003fe: 4770 pG BX lr
UART_Close
0x00000400: 2100 .! MOVS r1,#0
0x00000402: 6041 A` STR r1,[r0,#4]
0x00000404: 4770 pG BX lr
UART_DisableFlowCtrl
0x00000406: 6841 Ah LDR r1,[r0,#4]
0x00000408: 2203 ." MOVS r2,#3
0x0000040a: 0312 .. LSLS r2,r2,#12
0x0000040c: 4391 .C BICS r1,r1,r2
0x0000040e: 6041 A` STR r1,[r0,#4]
0x00000410: 4770 pG BX lr
UART_DisableInt
0x00000412: 6842 Bh LDR r2,[r0,#4]
0x00000414: 438a .C BICS r2,r2,r1
0x00000416: 6042 B` STR r2,[r0,#4]
0x00000418: 4770 pG BX lr
UART_EnableFlowCtrl
0x0000041a: 6901 .i LDR r1,[r0,#0x10]
0x0000041c: 2201 ." MOVS r2,#1
0x0000041e: 0252 R. LSLS r2,r2,#9
0x00000420: 4311 .C ORRS r1,r1,r2
0x00000422: 6101 .a STR r1,[r0,#0x10]
0x00000424: 6901 .i LDR r1,[r0,#0x10]
0x00000426: 2202 ." MOVS r2,#2
0x00000428: 4391 .C BICS r1,r1,r2
0x0000042a: 6101 .a STR r1,[r0,#0x10]
0x0000042c: 6941 Ai LDR r1,[r0,#0x14]
0x0000042e: 01d2 .. LSLS r2,r2,#7
0x00000430: 4311 .C ORRS r1,r1,r2
0x00000432: 6141 Aa STR r1,[r0,#0x14]
0x00000434: 6841 Ah LDR r1,[r0,#4]
0x00000436: 2203 ." MOVS r2,#3
0x00000438: 0312 .. LSLS r2,r2,#12
0x0000043a: 4311 .C ORRS r1,r1,r2
0x0000043c: 6041 A` STR r1,[r0,#4]
0x0000043e: 4770 pG BX lr
UART_EnableInt
0x00000440: 6842 Bh LDR r2,[r0,#4]
0x00000442: 430a .C ORRS r2,r2,r1
0x00000444: 6042 B` STR r2,[r0,#4]
0x00000446: 4770 pG BX lr
UART_Open
0x00000448: b570 p. PUSH {r4-r6,lr}
0x0000044a: 4e76 vN LDR r6,[pc,#472] ; [0x624] = 0x50000200
0x0000044c: 460d .F MOV r5,r1
0x0000044e: 4604 .F MOV r4,r0
0x00000450: 6971 qi LDR r1,[r6,#0x14]
0x00000452: 2000 . MOVS r0,#0
0x00000454: 0189 .. LSLS r1,r1,#6
0x00000456: 2203 ." MOVS r2,#3
0x00000458: 0f89 .. LSRS r1,r1,#30
0x0000045a: 6320 c STR r0,[r4,#0x30]
0x0000045c: 60e2 .` STR r2,[r4,#0xc]
0x0000045e: 60a0 .` STR r0,[r4,#8]
0x00000460: 2900 .) CMP r1,#0
0x00000462: d01f .. BEQ 0x4a4 ; UART_Open + 92
0x00000464: 2901 .) CMP r1,#1
0x00000466: d01f .. BEQ 0x4a8 ; UART_Open + 96
0x00000468: 2902 .) CMP r1,#2
0x0000046a: d301 .. BCC 0x470 ; UART_Open + 40
0x0000046c: 4871 qH LDR r0,[pc,#452] ; [0x634] = 0x20000000
0x0000046e: 6800 .h LDR r0,[r0,#0]
0x00000470: 69b1 .i LDR r1,[r6,#0x18]
0x00000472: 0509 .. LSLS r1,r1,#20
0x00000474: 0f09 .. LSRS r1,r1,#28
0x00000476: 1c49 I. ADDS r1,r1,#1
0x00000478: f000ff9f .... BL __aeabi_uidiv ; 0x13ba
0x0000047c: 4606 .F MOV r6,r0
0x0000047e: 2d00 .- CMP r5,#0
0x00000480: d019 .. BEQ 0x4b6 ; UART_Open + 110
0x00000482: 0868 h. LSRS r0,r5,#1
0x00000484: 1980 .. ADDS r0,r0,r6
0x00000486: 4629 )F MOV r1,r5
0x00000488: f000ff97 .... BL __aeabi_uidiv ; 0x13ba
0x0000048c: 496a jI LDR r1,[pc,#424] ; [0x638] = 0xffff
0x0000048e: 1e80 .. SUBS r0,r0,#2
0x00000490: 4288 .B CMP r0,r1
0x00000492: d90c .. BLS 0x4ae ; UART_Open + 102
0x00000494: 00e8 .. LSLS r0,r5,#3
0x00000496: 1980 .. ADDS r0,r0,r6
0x00000498: 4629 )F MOV r1,r5
0x0000049a: f000ff8e .... BL __aeabi_uidiv ; 0x13ba
0x0000049e: 0900 .. LSRS r0,r0,#4
0x000004a0: 1e80 .. SUBS r0,r0,#2
0x000004a2: e007 .. B 0x4b4 ; UART_Open + 108
0x000004a4: 4861 aH LDR r0,[pc,#388] ; [0x62c] = 0xb71b00
0x000004a6: e7e3 .. B 0x470 ; UART_Open + 40
0x000004a8: f7ffff74 ..t. BL CLK_GetPLLClockFreq ; 0x394
0x000004ac: e7e0 .. B 0x470 ; UART_Open + 40
0x000004ae: 2103 .! MOVS r1,#3
0x000004b0: 0709 .. LSLS r1,r1,#28
0x000004b2: 4308 .C ORRS r0,r0,r1
0x000004b4: 6260 `b STR r0,[r4,#0x24]
0x000004b6: bd70 p. POP {r4-r6,pc}
UART_Read
0x000004b8: b570 p. PUSH {r4-r6,lr}
0x000004ba: 4604 .F MOV r4,r0
0x000004bc: 2000 . MOVS r0,#0
0x000004be: 2501 .% MOVS r5,#1
0x000004c0: 07ad .. LSLS r5,r5,#30
0x000004c2: e00c .. B 0x4de ; UART_Read + 38
0x000004c4: 2300 .# MOVS r3,#0
0x000004c6: e004 .. B 0x4d2 ; UART_Read + 26
0x000004c8: 1c5b [. ADDS r3,r3,#1
0x000004ca: 42ab .B CMP r3,r5
0x000004cc: d301 .. BCC 0x4d2 ; UART_Read + 26
0x000004ce: 2000 . MOVS r0,#0
0x000004d0: bd70 p. POP {r4-r6,pc}
0x000004d2: 69a6 .i LDR r6,[r4,#0x18]
0x000004d4: 0476 v. LSLS r6,r6,#17
0x000004d6: d4f7 .. BMI 0x4c8 ; UART_Read + 16
0x000004d8: 6823 #h LDR r3,[r4,#0]
0x000004da: 540b .T STRB r3,[r1,r0]
0x000004dc: 1c40 @. ADDS r0,r0,#1
0x000004de: 4290 .B CMP r0,r2
0x000004e0: d3f0 .. BCC 0x4c4 ; UART_Read + 12
0x000004e2: bd70 p. POP {r4-r6,pc}
UART_SetLine_Config
0x000004e4: b5ff .. PUSH {r0-r7,lr}
0x000004e6: 4e4f ON LDR r6,[pc,#316] ; [0x624] = 0x50000200
0x000004e8: 460c .F MOV r4,r1
0x000004ea: 4605 .F MOV r5,r0
0x000004ec: 6971 qi LDR r1,[r6,#0x14]
0x000004ee: b081 .. SUB sp,sp,#4
0x000004f0: 4617 .F MOV r7,r2
0x000004f2: 2000 . MOVS r0,#0
0x000004f4: 0e09 .. LSRS r1,r1,#24
0x000004f6: 0789 .. LSLS r1,r1,#30
0x000004f8: 0f89 .. LSRS r1,r1,#30
0x000004fa: d01f .. BEQ 0x53c ; UART_SetLine_Config + 88
0x000004fc: 2901 .) CMP r1,#1
0x000004fe: d01f .. BEQ 0x540 ; UART_SetLine_Config + 92
0x00000500: 2902 .) CMP r1,#2
0x00000502: d301 .. BCC 0x508 ; UART_SetLine_Config + 36
0x00000504: 484b KH LDR r0,[pc,#300] ; [0x634] = 0x20000000
0x00000506: 6800 .h LDR r0,[r0,#0]
0x00000508: 69b1 .i LDR r1,[r6,#0x18]
0x0000050a: 0509 .. LSLS r1,r1,#20
0x0000050c: 0f09 .. LSRS r1,r1,#28
0x0000050e: 1c49 I. ADDS r1,r1,#1
0x00000510: f000ff53 ..S. BL __aeabi_uidiv ; 0x13ba
0x00000514: 4606 .F MOV r6,r0
0x00000516: 2c00 ., CMP r4,#0
0x00000518: d019 .. BEQ 0x54e ; UART_SetLine_Config + 106
0x0000051a: 0860 `. LSRS r0,r4,#1
0x0000051c: 1980 .. ADDS r0,r0,r6
0x0000051e: 4621 !F MOV r1,r4
0x00000520: f000ff4b ..K. BL __aeabi_uidiv ; 0x13ba
0x00000524: 4944 DI LDR r1,[pc,#272] ; [0x638] = 0xffff
0x00000526: 1e80 .. SUBS r0,r0,#2
0x00000528: 4288 .B CMP r0,r1
0x0000052a: d90c .. BLS 0x546 ; UART_SetLine_Config + 98
0x0000052c: 00e0 .. LSLS r0,r4,#3
0x0000052e: 1980 .. ADDS r0,r0,r6
0x00000530: 4621 !F MOV r1,r4
0x00000532: f000ff42 ..B. BL __aeabi_uidiv ; 0x13ba
0x00000536: 0900 .. LSRS r0,r0,#4
0x00000538: 1e80 .. SUBS r0,r0,#2
0x0000053a: e007 .. B 0x54c ; UART_SetLine_Config + 104
0x0000053c: 483b ;H LDR r0,[pc,#236] ; [0x62c] = 0xb71b00
0x0000053e: e7e3 .. B 0x508 ; UART_SetLine_Config + 36
0x00000540: f7ffff28 ..(. BL CLK_GetPLLClockFreq ; 0x394
0x00000544: e7e0 .. B 0x508 ; UART_SetLine_Config + 36
0x00000546: 2103 .! MOVS r1,#3
0x00000548: 0709 .. LSLS r1,r1,#28
0x0000054a: 4308 .C ORRS r0,r0,r1
0x0000054c: 6268 hb STR r0,[r5,#0x24]
0x0000054e: 9804 .. LDR r0,[sp,#0x10]
0x00000550: 4307 .C ORRS r7,r7,r0
0x00000552: 980a .. LDR r0,[sp,#0x28]
0x00000554: 4307 .C ORRS r7,r7,r0
0x00000556: 60ef .` STR r7,[r5,#0xc]
0x00000558: b005 .. ADD sp,sp,#0x14
0x0000055a: bdf0 .. POP {r4-r7,pc}
UART_SetTimeoutCnt
0x0000055c: 6a02 .j LDR r2,[r0,#0x20]
0x0000055e: 0a12 .. LSRS r2,r2,#8
0x00000560: 0212 .. LSLS r2,r2,#8
0x00000562: 430a .C ORRS r2,r2,r1
0x00000564: 6202 .b STR r2,[r0,#0x20]
0x00000566: 6841 Ah LDR r1,[r0,#4]
0x00000568: 2201 ." MOVS r2,#1
0x0000056a: 02d2 .. LSLS r2,r2,#11
0x0000056c: 4311 .C ORRS r1,r1,r2
0x0000056e: 6041 A` STR r1,[r0,#4]
0x00000570: 4770 pG BX lr
UART_SelectIrDAMode
0x00000572: b5f8 .. PUSH {r3-r7,lr}
0x00000574: 4d2b +M LDR r5,[pc,#172] ; [0x624] = 0x50000200
0x00000576: 460f .F MOV r7,r1
0x00000578: 4604 .F MOV r4,r0
0x0000057a: 6969 ii LDR r1,[r5,#0x14]
0x0000057c: 4616 .F MOV r6,r2
0x0000057e: 2000 . MOVS r0,#0
0x00000580: 0e09 .. LSRS r1,r1,#24
0x00000582: 0789 .. LSLS r1,r1,#30
0x00000584: 0f89 .. LSRS r1,r1,#30
0x00000586: d021 !. BEQ 0x5cc ; UART_SelectIrDAMode + 90
0x00000588: 2901 .) CMP r1,#1
0x0000058a: d021 !. BEQ 0x5d0 ; UART_SelectIrDAMode + 94
0x0000058c: 2902 .) CMP r1,#2
0x0000058e: d301 .. BCC 0x594 ; UART_SelectIrDAMode + 34
0x00000590: 4828 (H LDR r0,[pc,#160] ; [0x634] = 0x20000000
0x00000592: 6800 .h LDR r0,[r0,#0]
0x00000594: 69a9 .i LDR r1,[r5,#0x18]
0x00000596: 0509 .. LSLS r1,r1,#20
0x00000598: 0f09 .. LSRS r1,r1,#28
0x0000059a: 1c49 I. ADDS r1,r1,#1
0x0000059c: f000ff0d .... BL __aeabi_uidiv ; 0x13ba
0x000005a0: 00f9 .. LSLS r1,r7,#3
0x000005a2: 1808 .. ADDS r0,r1,r0
0x000005a4: 4639 9F MOV r1,r7
0x000005a6: f000ff08 .... BL __aeabi_uidiv ; 0x13ba
0x000005aa: 0900 .. LSRS r0,r0,#4
0x000005ac: 1e80 .. SUBS r0,r0,#2
0x000005ae: 6260 `b STR r0,[r4,#0x24]
0x000005b0: 6aa0 .j LDR r0,[r4,#0x28]
0x000005b2: 2120 ! MOVS r1,#0x20
0x000005b4: 4388 .C BICS r0,r0,r1
0x000005b6: 62a0 .b STR r0,[r4,#0x28]
0x000005b8: 6aa0 .j LDR r0,[r4,#0x28]
0x000005ba: 2140 @! MOVS r1,#0x40
0x000005bc: 4308 .C ORRS r0,r0,r1
0x000005be: 62a0 .b STR r0,[r4,#0x28]
0x000005c0: 2102 .! MOVS r1,#2
0x000005c2: 6aa0 .j LDR r0,[r4,#0x28]
0x000005c4: 2e00 .. CMP r6,#0
0x000005c6: d006 .. BEQ 0x5d6 ; UART_SelectIrDAMode + 100
0x000005c8: 4308 .C ORRS r0,r0,r1
0x000005ca: e005 .. B 0x5d8 ; UART_SelectIrDAMode + 102
0x000005cc: 4817 .H LDR r0,[pc,#92] ; [0x62c] = 0xb71b00
0x000005ce: e7e1 .. B 0x594 ; UART_SelectIrDAMode + 34
0x000005d0: f7fffee0 .... BL CLK_GetPLLClockFreq ; 0x394
0x000005d4: e7de .. B 0x594 ; UART_SelectIrDAMode + 34
0x000005d6: 4388 .C BICS r0,r0,r1
0x000005d8: 62a0 .b STR r0,[r4,#0x28]
0x000005da: 6321 !c STR r1,[r4,#0x30]
0x000005dc: bdf8 .. POP {r3-r7,pc}
UART_SelectRS485Mode
0x000005de: 2303 .# MOVS r3,#3
0x000005e0: 6303 .c STR r3,[r0,#0x30]
0x000005e2: 2300 .# MOVS r3,#0
0x000005e4: 62c3 .b STR r3,[r0,#0x2c]
0x000005e6: 6ac3 .j LDR r3,[r0,#0x2c]
0x000005e8: 0612 .. LSLS r2,r2,#24
0x000005ea: 430a .C ORRS r2,r2,r1
0x000005ec: 4313 .C ORRS r3,r3,r2
0x000005ee: 62c3 .b STR r3,[r0,#0x2c]
0x000005f0: 4770 pG BX lr
UART_Write
0x000005f2: b570 p. PUSH {r4-r6,lr}
0x000005f4: 4604 .F MOV r4,r0
0x000005f6: 2000 . MOVS r0,#0
0x000005f8: 2501 .% MOVS r5,#1
0x000005fa: 07ad .. LSLS r5,r5,#30
0x000005fc: e00c .. B 0x618 ; UART_Write + 38
0x000005fe: 2300 .# MOVS r3,#0
0x00000600: e004 .. B 0x60c ; UART_Write + 26
0x00000602: 1c5b [. ADDS r3,r3,#1
0x00000604: 42ab .B CMP r3,r5
0x00000606: d301 .. BCC 0x60c ; UART_Write + 26
0x00000608: 2000 . MOVS r0,#0
0x0000060a: bd70 p. POP {r4-r6,pc}
0x0000060c: 69a6 .i LDR r6,[r4,#0x18]
0x0000060e: 00f6 .. LSLS r6,r6,#3
0x00000610: d5f7 .. BPL 0x602 ; UART_Write + 16
0x00000612: 5c0b .\ LDRB r3,[r1,r0]
0x00000614: 6023 #` STR r3,[r4,#0]
0x00000616: 1c40 @. ADDS r0,r0,#1
0x00000618: 4290 .B CMP r0,r2
0x0000061a: d1f0 .. BNE 0x5fe ; UART_Write + 12
0x0000061c: bd70 p. POP {r4-r6,pc}
$d
0x0000061e: 0000 .. DCW 0
0x00000620: 04020201 .... DCD 67240449
0x00000624: 50000200 ...P DCD 1342177792
0x00000628: 01518000 ..Q. DCD 22118400
0x0000062c: 00b71b00 .... DCD 12000000
0x00000630: 01000001 .... DCD 16777217
0x00000634: 20000000 ... DCD 536870912
0x00000638: 0000ffff .... DCD 65535
$t
.text
CLK_DisableCKO
0x0000063c: 48fc .H LDR r0,[pc,#1008] ; [0xa30] = 0x50000200
0x0000063e: 6881 .h LDR r1,[r0,#8]
0x00000640: 2240 @" MOVS r2,#0x40
0x00000642: 4391 .C BICS r1,r1,r2
0x00000644: 6081 .` STR r1,[r0,#8]
0x00000646: 4770 pG BX lr
CLK_EnableCKO
0x00000648: 0152 R. LSLS r2,r2,#5
0x0000064a: 430a .C ORRS r2,r2,r1
0x0000064c: 2110 .! MOVS r1,#0x10
0x0000064e: 430a .C ORRS r2,r2,r1
0x00000650: 49f7 .I LDR r1,[pc,#988] ; [0xa30] = 0x50000200
0x00000652: 624a Jb STR r2,[r1,#0x24]
0x00000654: 688a .h LDR r2,[r1,#8]
0x00000656: 2340 @# MOVS r3,#0x40
0x00000658: 431a .C ORRS r2,r2,r3
0x0000065a: 608a .` STR r2,[r1,#8]
0x0000065c: 69ca .i LDR r2,[r1,#0x1c]
0x0000065e: 230c .# MOVS r3,#0xc
0x00000660: 439a .C BICS r2,r2,r3
0x00000662: 4302 .C ORRS r2,r2,r0
0x00000664: 61ca .a STR r2,[r1,#0x1c]
0x00000666: 4770 pG BX lr
CLK_PowerDown
0x00000668: 49f2 .I LDR r1,[pc,#968] ; [0xa34] = 0xe000ed00
0x0000066a: 2004 . MOVS r0,#4
0x0000066c: 6108 .a STR r0,[r1,#0x10]
0x0000066e: 48f0 .H LDR r0,[pc,#960] ; [0xa30] = 0x50000200
0x00000670: 6801 .h LDR r1,[r0,#0]
0x00000672: 22c0 ." MOVS r2,#0xc0
0x00000674: 4311 .C ORRS r1,r1,r2
0x00000676: 6001 .` STR r1,[r0,#0]
0x00000678: bf30 0. WFI
0x0000067a: 4770 pG BX lr
CLK_Idle
0x0000067c: 48ec .H LDR r0,[pc,#944] ; [0xa30] = 0x50000200
0x0000067e: 6801 .h LDR r1,[r0,#0]
0x00000680: 22c0 ." MOVS r2,#0xc0
0x00000682: 4311 .C ORRS r1,r1,r2
0x00000684: 6001 .` STR r1,[r0,#0]
0x00000686: bf30 0. WFI
0x00000688: 4770 pG BX lr
CLK_GetHXTFreq
0x0000068a: 48e9 .H LDR r0,[pc,#932] ; [0xa30] = 0x50000200
0x0000068c: 6800 .h LDR r0,[r0,#0]
0x0000068e: 0780 .. LSLS r0,r0,#30
0x00000690: 0f80 .. LSRS r0,r0,#30
0x00000692: 2801 .( CMP r0,#1
0x00000694: d001 .. BEQ 0x69a ; CLK_GetHXTFreq + 16
0x00000696: 2000 . MOVS r0,#0
0x00000698: 4770 pG BX lr
0x0000069a: 48e7 .H LDR r0,[pc,#924] ; [0xa38] = 0xb71b00
0x0000069c: 4770 pG BX lr
CLK_GetLXTFreq
0x0000069e: 48e4 .H LDR r0,[pc,#912] ; [0xa30] = 0x50000200
0x000006a0: 6800 .h LDR r0,[r0,#0]
0x000006a2: 0780 .. LSLS r0,r0,#30
0x000006a4: 0f80 .. LSRS r0,r0,#30
0x000006a6: 2802 .( CMP r0,#2
0x000006a8: d001 .. BEQ 0x6ae ; CLK_GetLXTFreq + 16
0x000006aa: 2000 . MOVS r0,#0
0x000006ac: 4770 pG BX lr
0x000006ae: 48e2 .H LDR r0,[pc,#904] ; [0xa38] = 0xb71b00
0x000006b0: 4770 pG BX lr
CLK_GetHCLKFreq
0x000006b2: b510 .. PUSH {r4,lr}
0x000006b4: f7fffd71 ..q. BL SystemCoreClockUpdate ; 0x19a
0x000006b8: 48e0 .H LDR r0,[pc,#896] ; [0xa3c] = 0x20000008
0x000006ba: 6800 .h LDR r0,[r0,#0]
0x000006bc: bd10 .. POP {r4,pc}
CLK_GetCPUFreq
0x000006be: b510 .. PUSH {r4,lr}
0x000006c0: f7fffd6b ..k. BL SystemCoreClockUpdate ; 0x19a
0x000006c4: 48dd .H LDR r0,[pc,#884] ; [0xa3c] = 0x20000008
0x000006c6: 6800 .h LDR r0,[r0,#0]
0x000006c8: bd10 .. POP {r4,pc}
CLK_SetHCLK
0x000006ca: b510 .. PUSH {r4,lr}
0x000006cc: 4ad8 .J LDR r2,[pc,#864] ; [0xa30] = 0x50000200
0x000006ce: 6993 .i LDR r3,[r2,#0x18]
0x000006d0: 091b .. LSRS r3,r3,#4
0x000006d2: 011b .. LSLS r3,r3,#4
0x000006d4: 430b .C ORRS r3,r3,r1
0x000006d6: 6193 .a STR r3,[r2,#0x18]
0x000006d8: 6911 .i LDR r1,[r2,#0x10]
0x000006da: 08c9 .. LSRS r1,r1,#3
0x000006dc: 00c9 .. LSLS r1,r1,#3
0x000006de: 4301 .C ORRS r1,r1,r0
0x000006e0: 6111 .a STR r1,[r2,#0x10]
0x000006e2: f7fffd5a ..Z. BL SystemCoreClockUpdate ; 0x19a
0x000006e6: bd10 .. POP {r4,pc}
CLK_WaitClockReady
0x000006e8: b510 .. PUSH {r4,lr}
0x000006ea: 4604 .F MOV r4,r0
0x000006ec: 49d4 .I LDR r1,[pc,#848] ; [0xa40] = 0x20f580
0x000006ee: 4bd0 .K LDR r3,[pc,#832] ; [0xa30] = 0x50000200
0x000006f0: e005 .. B 0x6fe ; CLK_WaitClockReady + 22
0x000006f2: 460a .F MOV r2,r1
0x000006f4: 1e49 I. SUBS r1,r1,#1
0x000006f6: 2a00 .* CMP r2,#0
0x000006f8: dc01 .. BGT 0x6fe ; CLK_WaitClockReady + 22
0x000006fa: 2000 . MOVS r0,#0
0x000006fc: bd10 .. POP {r4,pc}
0x000006fe: 68da .h LDR r2,[r3,#0xc]
0x00000700: 4620 F MOV r0,r4
0x00000702: 4390 .C BICS r0,r0,r2
0x00000704: d1f5 .. BNE 0x6f2 ; CLK_WaitClockReady + 10
0x00000706: 2001 . MOVS r0,#1
0x00000708: bd10 .. POP {r4,pc}
CLK_DisablePLL
0x0000070a: 48c9 .H LDR r0,[pc,#804] ; [0xa30] = 0x50000200
0x0000070c: 6a01 .j LDR r1,[r0,#0x20]
0x0000070e: 01c2 .. LSLS r2,r0,#7
0x00000710: 4311 .C ORRS r1,r1,r2
0x00000712: 6201 .b STR r1,[r0,#0x20]
0x00000714: 4770 pG BX lr
CLK_EnablePLL
0x00000716: b5f3 .. PUSH {r0,r1,r4-r7,lr}
0x00000718: b085 .. SUB sp,sp,#0x14
0x0000071a: 460c .F MOV r4,r1
0x0000071c: f7fffff5 .... BL CLK_DisablePLL ; 0x70a
0x00000720: 9805 .. LDR r0,[sp,#0x14]
0x00000722: 2800 .( CMP r0,#0
0x00000724: 48c2 .H LDR r0,[pc,#776] ; [0xa30] = 0x50000200
0x00000726: 6801 .h LDR r1,[r0,#0]
0x00000728: d013 .. BEQ 0x752 ; CLK_EnablePLL + 60
0x0000072a: 2204 ." MOVS r2,#4
0x0000072c: 4311 .C ORRS r1,r1,r2
0x0000072e: 6001 .` STR r1,[r0,#0]
0x00000730: 2010 . MOVS r0,#0x10
0x00000732: f7ffffd9 .... BL CLK_WaitClockReady ; 0x6e8
0x00000736: 2001 . MOVS r0,#1
0x00000738: 04c0 .. LSLS r0,r0,#19
0x0000073a: 9003 .. STR r0,[sp,#0xc]
0x0000073c: 48c1 .H LDR r0,[pc,#772] ; [0xa44] = 0x1518000
0x0000073e: 9001 .. STR r0,[sp,#4]
0x00000740: 2004 . MOVS r0,#4
0x00000742: 9002 .. STR r0,[sp,#8]
0x00000744: 48c0 .H LDR r0,[pc,#768] ; [0xa48] = 0xfa0a1eff
0x00000746: 49c1 .I LDR r1,[pc,#772] ; [0xa4c] = 0x5f5e0ff
0x00000748: 1820 . ADDS r0,r4,r0
0x0000074a: 4288 .B CMP r0,r1
0x0000074c: d80e .. BHI 0x76c ; CLK_EnablePLL + 86
0x0000074e: 2700 .' MOVS r7,#0
0x00000750: e01c .. B 0x78c ; CLK_EnablePLL + 118
0x00000752: 0889 .. LSRS r1,r1,#2
0x00000754: 0089 .. LSLS r1,r1,#2
0x00000756: 1c49 I. ADDS r1,r1,#1
0x00000758: 6001 .` STR r1,[r0,#0]
0x0000075a: 2001 . MOVS r0,#1
0x0000075c: f7ffffc4 .... BL CLK_WaitClockReady ; 0x6e8
0x00000760: 2000 . MOVS r0,#0
0x00000762: 9003 .. STR r0,[sp,#0xc]
0x00000764: 48b4 .H LDR r0,[pc,#720] ; [0xa38] = 0xb71b00
0x00000766: 9001 .. STR r0,[sp,#4]
0x00000768: 2002 . MOVS r0,#2
0x0000076a: e7ea .. B 0x742 ; CLK_EnablePLL + 44
0x0000076c: 48b8 .H LDR r0,[pc,#736] ; [0xa50] = 0xfd050f80
0x0000076e: 49b8 .I LDR r1,[pc,#736] ; [0xa50] = 0xfd050f80
0x00000770: 1820 . ADDS r0,r4,r0
0x00000772: 4249 IB RSBS r1,r1,#0
0x00000774: 4288 .B CMP r0,r1
0x00000776: d802 .. BHI 0x77e ; CLK_EnablePLL + 104
0x00000778: 2701 .' MOVS r7,#1
0x0000077a: 0064 d. LSLS r4,r4,#1
0x0000077c: e006 .. B 0x78c ; CLK_EnablePLL + 118
0x0000077e: 48b5 .H LDR r0,[pc,#724] ; [0xa54] = 0xfe8287c0
0x00000780: 1821 !. ADDS r1,r4,r0
0x00000782: 4240 @B RSBS r0,r0,#0
0x00000784: 4281 .B CMP r1,r0
0x00000786: d27b {. BCS 0x880 ; CLK_EnablePLL + 362
0x00000788: 2703 .' MOVS r7,#3
0x0000078a: 00a4 .. LSLS r4,r4,#2
0x0000078c: 2500 .% MOVS r5,#0
0x0000078e: 43ed .C MVNS r5,r5
0x00000790: 9e02 .. LDR r6,[sp,#8]
0x00000792: e022 ". B 0x7da ; CLK_EnablePLL + 196
0x00000794: 4631 1F MOV r1,r6
0x00000796: 9801 .. LDR r0,[sp,#4]
0x00000798: f000fe0f .... BL __aeabi_uidiv ; 0x13ba
0x0000079c: 49ae .I LDR r1,[pc,#696] ; [0xa58] = 0xffe795ff
0x0000079e: 4684 .F MOV r12,r0
0x000007a0: 1841 A. ADDS r1,r0,r1
0x000007a2: 48ae .H LDR r0,[pc,#696] ; [0xa5c] = 0xcc77bf
0x000007a4: 4281 .B CMP r1,r0
0x000007a6: d217 .. BCS 0x7d8 ; CLK_EnablePLL + 194
0x000007a8: 4ba8 .K LDR r3,[pc,#672] ; [0xa4c] = 0x5f5e0ff
0x000007aa: 2102 .! MOVS r1,#2
0x000007ac: 1c5b [. ADDS r3,r3,#1
0x000007ae: 48a6 .H LDR r0,[pc,#664] ; [0xa48] = 0xfa0a1eff
0x000007b0: 4662 bF MOV r2,r12
0x000007b2: 434a JC MULS r2,r1,r2
0x000007b4: 1c40 @. ADDS r0,r0,#1
0x000007b6: 1810 .. ADDS r0,r2,r0
0x000007b8: 4298 .B CMP r0,r3
0x000007ba: d809 .. BHI 0x7d0 ; CLK_EnablePLL + 186
0x000007bc: 42a2 .B CMP r2,r4
0x000007be: d901 .. BLS 0x7c4 ; CLK_EnablePLL + 174
0x000007c0: 1b10 .. SUBS r0,r2,r4
0x000007c2: e000 .. B 0x7c6 ; CLK_EnablePLL + 176
0x000007c4: 1aa0 .. SUBS r0,r4,r2
0x000007c6: 42a8 .B CMP r0,r5
0x000007c8: d202 .. BCS 0x7d0 ; CLK_EnablePLL + 186
0x000007ca: 0005 .. MOVS r5,r0
0x000007cc: 9100 .. STR r1,[sp,#0]
0x000007ce: d00b .. BEQ 0x7e8 ; CLK_EnablePLL + 210
0x000007d0: 48a3 .H LDR r0,[pc,#652] ; [0xa60] = 0x201
0x000007d2: 1c49 I. ADDS r1,r1,#1
0x000007d4: 4281 .B CMP r1,r0
0x000007d6: d9ea .. BLS 0x7ae ; CLK_EnablePLL + 152
0x000007d8: 1c76 v. ADDS r6,r6,#1
0x000007da: 2e21 !. CMP r6,#0x21
0x000007dc: d9da .. BLS 0x794 ; CLK_EnablePLL + 126
0x000007de: 2600 .& MOVS r6,#0
0x000007e0: 9504 .. STR r5,[sp,#0x10]
0x000007e2: 43f6 .C MVNS r6,r6
0x000007e4: 9d02 .. LDR r5,[sp,#8]
0x000007e6: e051 Q. B 0x88c ; CLK_EnablePLL + 374
0x000007e8: 9803 .. LDR r0,[sp,#0xc]
0x000007ea: 03b9 .. LSLS r1,r7,#14
0x000007ec: 4301 .C ORRS r1,r1,r0
0x000007ee: 2001 . MOVS r0,#1
0x000007f0: 0272 r. LSLS r2,r6,#9
0x000007f2: 0280 .. LSLS r0,r0,#10
0x000007f4: 1a10 .. SUBS r0,r2,r0
0x000007f6: 4301 .C ORRS r1,r1,r0
0x000007f8: 9800 .. LDR r0,[sp,#0]
0x000007fa: 1e80 .. SUBS r0,r0,#2
0x000007fc: 4301 .C ORRS r1,r1,r0
0x000007fe: 488c .H LDR r0,[pc,#560] ; [0xa30] = 0x50000200
0x00000800: 6201 .b STR r1,[r0,#0x20]
0x00000802: 2004 . MOVS r0,#4
0x00000804: f7ffff70 ..p. BL CLK_WaitClockReady ; 0x6e8
0x00000808: 1c79 y. ADDS r1,r7,#1
0x0000080a: 4371 qC MULS r1,r6,r1
0x0000080c: e031 1. B 0x872 ; CLK_EnablePLL + 348
0x0000080e: 4629 )F MOV r1,r5
0x00000810: 9801 .. LDR r0,[sp,#4]
0x00000812: f000fdd2 .... BL __aeabi_uidiv ; 0x13ba
0x00000816: 4990 .I LDR r1,[pc,#576] ; [0xa58] = 0xffe795ff
0x00000818: 4684 .F MOV r12,r0
0x0000081a: 1841 A. ADDS r1,r0,r1
0x0000081c: 488f .H LDR r0,[pc,#572] ; [0xa5c] = 0xcc77bf
0x0000081e: 4281 .B CMP r1,r0
0x00000820: d233 3. BCS 0x88a ; CLK_EnablePLL + 372
0x00000822: 4b8a .K LDR r3,[pc,#552] ; [0xa4c] = 0x5f5e0ff
0x00000824: 2102 .! MOVS r1,#2
0x00000826: 1c5b [. ADDS r3,r3,#1
0x00000828: 4887 .H LDR r0,[pc,#540] ; [0xa48] = 0xfa0a1eff
0x0000082a: 4662 bF MOV r2,r12
0x0000082c: 434a JC MULS r2,r1,r2
0x0000082e: 1c40 @. ADDS r0,r0,#1
0x00000830: 1810 .. ADDS r0,r2,r0
0x00000832: 4298 .B CMP r0,r3
0x00000834: d825 %. BHI 0x882 ; CLK_EnablePLL + 364
0x00000836: 42a2 .B CMP r2,r4
0x00000838: d901 .. BLS 0x83e ; CLK_EnablePLL + 296
0x0000083a: 1b10 .. SUBS r0,r2,r4
0x0000083c: e000 .. B 0x840 ; CLK_EnablePLL + 298
0x0000083e: 1aa0 .. SUBS r0,r4,r2
0x00000840: 42b0 .B CMP r0,r6
0x00000842: d21e .. BCS 0x882 ; CLK_EnablePLL + 364
0x00000844: 9a04 .. LDR r2,[sp,#0x10]
0x00000846: 4606 .F MOV r6,r0
0x00000848: 9100 .. STR r1,[sp,#0]
0x0000084a: 4290 .B CMP r0,r2
0x0000084c: d119 .. BNE 0x882 ; CLK_EnablePLL + 364
0x0000084e: 9903 .. LDR r1,[sp,#0xc]
0x00000850: 03b8 .. LSLS r0,r7,#14
0x00000852: 4308 .C ORRS r0,r0,r1
0x00000854: 2101 .! MOVS r1,#1
0x00000856: 026a j. LSLS r2,r5,#9
0x00000858: 0289 .. LSLS r1,r1,#10
0x0000085a: 1a51 Q. SUBS r1,r2,r1
0x0000085c: 4308 .C ORRS r0,r0,r1
0x0000085e: 9900 .. LDR r1,[sp,#0]
0x00000860: 1e89 .. SUBS r1,r1,#2
0x00000862: 4308 .C ORRS r0,r0,r1
0x00000864: 4972 rI LDR r1,[pc,#456] ; [0xa30] = 0x50000200
0x00000866: 6208 .b STR r0,[r1,#0x20]
0x00000868: 2004 . MOVS r0,#4
0x0000086a: f7ffff3d ..=. BL CLK_WaitClockReady ; 0x6e8
0x0000086e: 1c79 y. ADDS r1,r7,#1
0x00000870: 4369 iC MULS r1,r5,r1
0x00000872: 9801 .. LDR r0,[sp,#4]
0x00000874: f000fda1 .... BL __aeabi_uidiv ; 0x13ba
0x00000878: 9900 .. LDR r1,[sp,#0]
0x0000087a: 4348 HC MULS r0,r1,r0
0x0000087c: b007 .. ADD sp,sp,#0x1c
0x0000087e: bdf0 .. POP {r4-r7,pc}
0x00000880: e006 .. B 0x890 ; CLK_EnablePLL + 378
0x00000882: 4877 wH LDR r0,[pc,#476] ; [0xa60] = 0x201
0x00000884: 1c49 I. ADDS r1,r1,#1
0x00000886: 4281 .B CMP r1,r0
0x00000888: d9ce .. BLS 0x828 ; CLK_EnablePLL + 274
0x0000088a: 1c6d m. ADDS r5,r5,#1
0x0000088c: 2d21 !- CMP r5,#0x21
0x0000088e: d9be .. BLS 0x80e ; CLK_EnablePLL + 248
0x00000890: 9805 .. LDR r0,[sp,#0x14]
0x00000892: 2800 .( CMP r0,#0
0x00000894: d00f .. BEQ 0x8b6 ; CLK_EnablePLL + 416
0x00000896: 4973 sI LDR r1,[pc,#460] ; [0xa64] = 0x84418
0x00000898: 4865 eH LDR r0,[pc,#404] ; [0xa30] = 0x50000200
0x0000089a: 6201 .b STR r1,[r0,#0x20]
0x0000089c: 2004 . MOVS r0,#4
0x0000089e: f7ffff23 ..#. BL CLK_WaitClockReady ; 0x6e8
0x000008a2: a071 q. ADR r0,{pc}+0x1c6 ; 0xa68
0x000008a4: 6800 .h LDR r0,[r0,#0]
0x000008a6: 9000 .. STR r0,[sp,#0]
0x000008a8: 4861 aH LDR r0,[pc,#388] ; [0xa30] = 0x50000200
0x000008aa: 6a01 .j LDR r1,[r0,#0x20]
0x000008ac: 1300 .. ASRS r0,r0,#12
0x000008ae: 4201 .B TST r1,r0
0x000008b0: d003 .. BEQ 0x8ba ; CLK_EnablePLL + 420
0x000008b2: 2000 . MOVS r0,#0
0x000008b4: e7e2 .. B 0x87c ; CLK_EnablePLL + 358
0x000008b6: 496d mI LDR r1,[pc,#436] ; [0xa6c] = 0x4016
0x000008b8: e7ee .. B 0x898 ; CLK_EnablePLL + 386
0x000008ba: 0308 .. LSLS r0,r1,#12
0x000008bc: d501 .. BPL 0x8c2 ; CLK_EnablePLL + 428
0x000008be: 4861 aH LDR r0,[pc,#388] ; [0xa44] = 0x1518000
0x000008c0: e000 .. B 0x8c4 ; CLK_EnablePLL + 430
0x000008c2: 485d ]H LDR r0,[pc,#372] ; [0xa38] = 0xb71b00
0x000008c4: 038a .. LSLS r2,r1,#14
0x000008c6: d4d9 .. BMI 0x87c ; CLK_EnablePLL + 358
0x000008c8: 040a .. LSLS r2,r1,#16
0x000008ca: 0f92 .. LSRS r2,r2,#30
0x000008cc: 466b kF MOV r3,sp
0x000008ce: 5c9b .\ LDRB r3,[r3,r2]
0x000008d0: 05ca .. LSLS r2,r1,#23
0x000008d2: 0489 .. LSLS r1,r1,#18
0x000008d4: 0dd2 .. LSRS r2,r2,#23
0x000008d6: 0ec9 .. LSRS r1,r1,#27
0x000008d8: 1c89 .. ADDS r1,r1,#2
0x000008da: 0880 .. LSRS r0,r0,#2
0x000008dc: 1c92 .. ADDS r2,r2,#2
0x000008de: 4359 YC MULS r1,r3,r1
0x000008e0: 4350 PC MULS r0,r2,r0
0x000008e2: f000fd6a ..j. BL __aeabi_uidiv ; 0x13ba
0x000008e6: 0080 .. LSLS r0,r0,#2
0x000008e8: e7c8 .. B 0x87c ; CLK_EnablePLL + 358
CLK_SetCoreClock
0x000008ea: b5f8 .. PUSH {r3-r7,lr}
0x000008ec: 4d50 PM LDR r5,[pc,#320] ; [0xa30] = 0x50000200
0x000008ee: 4604 .F MOV r4,r0
0x000008f0: 68ee .h LDR r6,[r5,#0xc]
0x000008f2: 2010 . MOVS r0,#0x10
0x000008f4: 4006 .@ ANDS r6,r6,r0
0x000008f6: 4856 VH LDR r0,[pc,#344] ; [0xa50] = 0xfd050f80
0x000008f8: 4240 @B RSBS r0,r0,#0
0x000008fa: 4284 .B CMP r4,r0
0x000008fc: d802 .. BHI 0x904 ; CLK_SetCoreClock + 26
0x000008fe: 1040 @. ASRS r0,r0,#1
0x00000900: 4284 .B CMP r4,r0
0x00000902: d200 .. BCS 0x906 ; CLK_SetCoreClock + 28
0x00000904: 4604 .F MOV r4,r0
0x00000906: 6828 (h LDR r0,[r5,#0]
0x00000908: 2704 .' MOVS r7,#4
0x0000090a: 4338 8C ORRS r0,r0,r7
0x0000090c: 6028 (` STR r0,[r5,#0]
0x0000090e: 2010 . MOVS r0,#0x10
0x00000910: f7fffeea .... BL CLK_WaitClockReady ; 0x6e8
0x00000914: 6928 (i LDR r0,[r5,#0x10]
0x00000916: 2107 .! MOVS r1,#7
0x00000918: 4308 .C ORRS r0,r0,r1
0x0000091a: 6128 (a STR r0,[r5,#0x10]
0x0000091c: 69a8 .i LDR r0,[r5,#0x18]
0x0000091e: 0900 .. LSRS r0,r0,#4
0x00000920: 0100 .. LSLS r0,r0,#4
0x00000922: 61a8 .a STR r0,[r5,#0x18]
0x00000924: 6828 (h LDR r0,[r5,#0]
0x00000926: 0780 .. LSLS r0,r0,#30
0x00000928: 0f80 .. LSRS r0,r0,#30
0x0000092a: 2801 .( CMP r0,#1
0x0000092c: d00e .. BEQ 0x94c ; CLK_SetCoreClock + 98
0x0000092e: 0061 a. LSLS r1,r4,#1
0x00000930: 0478 x. LSLS r0,r7,#17
0x00000932: f7fffef0 .... BL CLK_EnablePLL ; 0x716
0x00000936: 68ee .h LDR r6,[r5,#0xc]
0x00000938: 4604 .F MOV r4,r0
0x0000093a: 2010 . MOVS r0,#0x10
0x0000093c: 4006 .@ ANDS r6,r6,r0
0x0000093e: 2101 .! MOVS r1,#1
0x00000940: 2002 . MOVS r0,#2
0x00000942: f7fffec2 .... BL CLK_SetHCLK ; 0x6ca
0x00000946: 2e00 .. CMP r6,#0
0x00000948: d006 .. BEQ 0x958 ; CLK_SetCoreClock + 110
0x0000094a: e008 .. B 0x95e ; CLK_SetCoreClock + 116
0x0000094c: 0061 a. LSLS r1,r4,#1
0x0000094e: 2000 . MOVS r0,#0
0x00000950: f7fffee1 .... BL CLK_EnablePLL ; 0x716
0x00000954: 4604 .F MOV r4,r0
0x00000956: e7f2 .. B 0x93e ; CLK_SetCoreClock + 84
0x00000958: 6828 (h LDR r0,[r5,#0]
0x0000095a: 43b8 .C BICS r0,r0,r7
0x0000095c: 6028 (` STR r0,[r5,#0]
0x0000095e: 0860 `. LSRS r0,r4,#1
0x00000960: bdf8 .. POP {r3-r7,pc}
CLK_SetModuleClock
0x00000962: b570 p. PUSH {r4-r6,lr}
0x00000964: 0e43 C. LSRS r3,r0,#25
0x00000966: 071b .. LSLS r3,r3,#28
0x00000968: d00e .. BEQ 0x988 ; CLK_SetModuleClock + 38
0x0000096a: 0043 C. LSLS r3,r0,#1
0x0000096c: 4c30 0L LDR r4,[pc,#192] ; [0xa30] = 0x50000200
0x0000096e: 0f9b .. LSRS r3,r3,#30
0x00000970: 009b .. LSLS r3,r3,#2
0x00000972: 3410 .4 ADDS r4,r4,#0x10
0x00000974: 191b .. ADDS r3,r3,r4
0x00000976: 681c .h LDR r4,[r3,#0]
0x00000978: 00c5 .. LSLS r5,r0,#3
0x0000097a: 0f2d -. LSRS r5,r5,#28
0x0000097c: 01c6 .. LSLS r6,r0,#7
0x0000097e: 0ef6 .. LSRS r6,r6,#27
0x00000980: 40b5 .@ LSLS r5,r5,r6
0x00000982: 43ac .C BICS r4,r4,r5
0x00000984: 430c .C ORRS r4,r4,r1
0x00000986: 601c .` STR r4,[r3,#0]
0x00000988: 0a83 .. LSRS r3,r0,#10
0x0000098a: 0619 .. LSLS r1,r3,#24
0x0000098c: 0e09 .. LSRS r1,r1,#24
0x0000098e: d00d .. BEQ 0x9ac ; CLK_SetModuleClock + 74
0x00000990: 0301 .. LSLS r1,r0,#12
0x00000992: 4c27 'L LDR r4,[pc,#156] ; [0xa30] = 0x50000200
0x00000994: 0f89 .. LSRS r1,r1,#30
0x00000996: 0089 .. LSLS r1,r1,#2
0x00000998: 3418 .4 ADDS r4,r4,#0x18
0x0000099a: 1909 .. ADDS r1,r1,r4
0x0000099c: 680c .h LDR r4,[r1,#0]
0x0000099e: 0580 .. LSLS r0,r0,#22
0x000009a0: b2db .. UXTB r3,r3
0x000009a2: 0ec0 .. LSRS r0,r0,#27
0x000009a4: 4083 .@ LSLS r3,r3,r0
0x000009a6: 439c .C BICS r4,r4,r3
0x000009a8: 4314 .C ORRS r4,r4,r2
0x000009aa: 600c .` STR r4,[r1,#0]
0x000009ac: bd70 p. POP {r4-r6,pc}
CLK_SetSysTickClockSrc
0x000009ae: 4a20 J LDR r2,[pc,#128] ; [0xa30] = 0x50000200
0x000009b0: 6911 .i LDR r1,[r2,#0x10]
0x000009b2: 2338 8# MOVS r3,#0x38
0x000009b4: 4399 .C BICS r1,r1,r3
0x000009b6: 4301 .C ORRS r1,r1,r0
0x000009b8: 6111 .a STR r1,[r2,#0x10]
0x000009ba: 4770 pG BX lr
CLK_EnableSysTick
0x000009bc: b570 p. PUSH {r4-r6,lr}
0x000009be: 4a2c ,J LDR r2,[pc,#176] ; [0xa70] = 0xe000e000
0x000009c0: 2300 .# MOVS r3,#0
0x000009c2: 6113 .a STR r3,[r2,#0x10]
0x000009c4: 2404 .$ MOVS r4,#4
0x000009c6: 2808 .( CMP r0,#8
0x000009c8: d00f .. BEQ 0x9ea ; CLK_EnableSysTick + 46
0x000009ca: 6915 .i LDR r5,[r2,#0x10]
0x000009cc: 43a5 .C BICS r5,r5,r4
0x000009ce: 6115 .a STR r5,[r2,#0x10]
0x000009d0: 4d17 .M LDR r5,[pc,#92] ; [0xa30] = 0x50000200
0x000009d2: 692c ,i LDR r4,[r5,#0x10]
0x000009d4: 2638 8& MOVS r6,#0x38
0x000009d6: 43b4 .C BICS r4,r4,r6
0x000009d8: 4304 .C ORRS r4,r4,r0
0x000009da: 612c ,a STR r4,[r5,#0x10]
0x000009dc: 6151 Qa STR r1,[r2,#0x14]
0x000009de: 6193 .a STR r3,[r2,#0x18]
0x000009e0: 6910 .i LDR r0,[r2,#0x10]
0x000009e2: 2101 .! MOVS r1,#1
0x000009e4: 4308 .C ORRS r0,r0,r1
0x000009e6: 6110 .a STR r0,[r2,#0x10]
0x000009e8: bd70 p. POP {r4-r6,pc}
0x000009ea: 6910 .i LDR r0,[r2,#0x10]
0x000009ec: 4320 C ORRS r0,r0,r4
0x000009ee: 6110 .a STR r0,[r2,#0x10]
0x000009f0: e7f4 .. B 0x9dc ; CLK_EnableSysTick + 32
CLK_DisableSysTick
0x000009f2: 491f .I LDR r1,[pc,#124] ; [0xa70] = 0xe000e000
0x000009f4: 2000 . MOVS r0,#0
0x000009f6: 6108 .a STR r0,[r1,#0x10]
0x000009f8: 4770 pG BX lr
CLK_EnableXtalRC
0x000009fa: 490d .I LDR r1,[pc,#52] ; [0xa30] = 0x50000200
0x000009fc: 0782 .. LSLS r2,r0,#30
0x000009fe: 680a .h LDR r2,[r1,#0]
0x00000a00: d001 .. BEQ 0xa06 ; CLK_EnableXtalRC + 12
0x00000a02: 0892 .. LSRS r2,r2,#2
0x00000a04: 0092 .. LSLS r2,r2,#2
0x00000a06: 4302 .C ORRS r2,r2,r0
0x00000a08: 600a .` STR r2,[r1,#0]
0x00000a0a: 4770 pG BX lr
CLK_DisableXtalRC
0x00000a0c: 4908 .I LDR r1,[pc,#32] ; [0xa30] = 0x50000200
0x00000a0e: 680a .h LDR r2,[r1,#0]
0x00000a10: 4382 .C BICS r2,r2,r0
0x00000a12: 600a .` STR r2,[r1,#0]
0x00000a14: 4770 pG BX lr
CLK_EnableModuleClock
0x00000a16: 0fc1 .. LSRS r1,r0,#31
0x00000a18: 008a .. LSLS r2,r1,#2
0x00000a1a: 4905 .I LDR r1,[pc,#20] ; [0xa30] = 0x50000200
0x00000a1c: 1851 Q. ADDS r1,r2,r1
0x00000a1e: 684a Jh LDR r2,[r1,#4]
0x00000a20: 06c3 .. LSLS r3,r0,#27
0x00000a22: 0edb .. LSRS r3,r3,#27
0x00000a24: 2001 . MOVS r0,#1
0x00000a26: 4098 .@ LSLS r0,r0,r3
0x00000a28: 4302 .C ORRS r2,r2,r0
0x00000a2a: 604a J` STR r2,[r1,#4]
0x00000a2c: 4770 pG BX lr
$d
0x00000a2e: 0000 .. DCW 0
0x00000a30: 50000200 ...P DCD 1342177792
0x00000a34: e000ed00 .... DCD 3758157056
0x00000a38: 00b71b00 .... DCD 12000000
0x00000a3c: 20000008 ... DCD 536870920
0x00000a40: 0020f580 .. . DCD 2160000
0x00000a44: 01518000 ..Q. DCD 22118400
0x00000a48: fa0a1eff .... DCD 4194967295
0x00000a4c: 05f5e0ff .... DCD 99999999
0x00000a50: fd050f80 .... DCD 4244967296
0x00000a54: fe8287c0 .... DCD 4269967296
0x00000a58: ffe795ff .... DCD 4293367295
0x00000a5c: 00cc77bf .w.. DCD 13399999
0x00000a60: 00000201 .... DCD 513
0x00000a64: 00084418 .D.. DCD 541720
0x00000a68: 04020201 .... DCD 67240449
0x00000a6c: 00004016 .@.. DCD 16406
0x00000a70: e000e000 .... DCD 3758153728
$t
CLK_DisableModuleClock
0x00000a74: 0fc1 .. LSRS r1,r0,#31
0x00000a76: 008a .. LSLS r2,r1,#2
0x00000a78: 490b .I LDR r1,[pc,#44] ; [0xaa8] = 0x50000200
0x00000a7a: 1851 Q. ADDS r1,r2,r1
0x00000a7c: 684a Jh LDR r2,[r1,#4]
0x00000a7e: 06c3 .. LSLS r3,r0,#27
0x00000a80: 0edb .. LSRS r3,r3,#27
0x00000a82: 2001 . MOVS r0,#1
0x00000a84: 4098 .@ LSLS r0,r0,r3
0x00000a86: 4382 .C BICS r2,r2,r0
0x00000a88: 604a J` STR r2,[r1,#4]
0x00000a8a: e7cf .. B 0xa2c ; CLK_EnableModuleClock + 22
CLK_SysTickDelay
0x00000a8c: 4907 .I LDR r1,[pc,#28] ; [0xaac] = 0x2000000c
0x00000a8e: 6809 .h LDR r1,[r1,#0]
0x00000a90: 4348 HC MULS r0,r1,r0
0x00000a92: 4907 .I LDR r1,[pc,#28] ; [0xab0] = 0xe000e000
0x00000a94: 6148 Ha STR r0,[r1,#0x14]
0x00000a96: 2200 ." MOVS r2,#0
0x00000a98: 618a .a STR r2,[r1,#0x18]
0x00000a9a: 2005 . MOVS r0,#5
0x00000a9c: 6108 .a STR r0,[r1,#0x10]
0x00000a9e: 6908 .i LDR r0,[r1,#0x10]
0x00000aa0: 03c0 .. LSLS r0,r0,#15
0x00000aa2: d5fc .. BPL 0xa9e ; CLK_SysTickDelay + 18
0x00000aa4: 610a .a STR r2,[r1,#0x10]
0x00000aa6: e7c1 .. B 0xa2c ; CLK_EnableModuleClock + 22
$d
0x00000aa8: 50000200 ...P DCD 1342177792
0x00000aac: 2000000c ... DCD 536870924
0x00000ab0: e000e000 .... DCD 3758153728
$t
.text
ADC_Open
0x00000ab4: 4843 CH LDR r0,[pc,#268] ; [0xbc4] = 0x400e0000
0x00000ab6: 6a41 Aj LDR r1,[r0,#0x24]
0x00000ab8: 0a09 .. LSRS r1,r1,#8
0x00000aba: 0209 .. LSLS r1,r1,#8
0x00000abc: 4319 .C ORRS r1,r1,r3
0x00000abe: 6241 Ab STR r1,[r0,#0x24]
0x00000ac0: 4770 pG BX lr
ADC_Close
0x00000ac2: 2005 . MOVS r0,#5
0x00000ac4: 0700 .. LSLS r0,r0,#28
0x00000ac6: 68c2 .h LDR r2,[r0,#0xc]
0x00000ac8: 2101 .! MOVS r1,#1
0x00000aca: 0709 .. LSLS r1,r1,#28
0x00000acc: 430a .C ORRS r2,r2,r1
0x00000ace: 60c2 .` STR r2,[r0,#0xc]
0x00000ad0: 68c2 .h LDR r2,[r0,#0xc]
0x00000ad2: 438a .C BICS r2,r2,r1
0x00000ad4: 60c2 .` STR r2,[r0,#0xc]
0x00000ad6: 4770 pG BX lr
ADC_EnableHWTrigger
0x00000ad8: b530 0. PUSH {r4,r5,lr}
0x00000ada: 483a :H LDR r0,[pc,#232] ; [0xbc4] = 0x400e0000
0x00000adc: 6a03 .j LDR r3,[r0,#0x20]
0x00000ade: 24ff .$ MOVS r4,#0xff
0x00000ae0: 3471 q4 ADDS r4,r4,#0x71
0x00000ae2: 43a3 .C BICS r3,r3,r4
0x00000ae4: 6203 .b STR r3,[r0,#0x20]
0x00000ae6: 1583 .. ASRS r3,r0,#22
0x00000ae8: 2900 .) CMP r1,#0
0x00000aea: d00b .. BEQ 0xb04 ; ADC_EnableHWTrigger + 44
0x00000aec: 4c35 5L LDR r4,[pc,#212] ; [0xbc4] = 0x400e0000
0x00000aee: 3440 @4 ADDS r4,r4,#0x40
0x00000af0: 6865 eh LDR r5,[r4,#4]
0x00000af2: 0a2d -. LSRS r5,r5,#8
0x00000af4: 022d -. LSLS r5,r5,#8
0x00000af6: 4315 .C ORRS r5,r5,r2
0x00000af8: 6065 e` STR r5,[r4,#4]
0x00000afa: 6a02 .j LDR r2,[r0,#0x20]
0x00000afc: 4319 .C ORRS r1,r1,r3
0x00000afe: 430a .C ORRS r2,r2,r1
0x00000b00: 6202 .b STR r2,[r0,#0x20]
0x00000b02: bd30 0. POP {r4,r5,pc}
0x00000b04: 6a01 .j LDR r1,[r0,#0x20]
0x00000b06: 431a .C ORRS r2,r2,r3
0x00000b08: 4311 .C ORRS r1,r1,r2
0x00000b0a: 6201 .b STR r1,[r0,#0x20]
0x00000b0c: bd30 0. POP {r4,r5,pc}
ADC_DisableHWTrigger
0x00000b0e: 482d -H LDR r0,[pc,#180] ; [0xbc4] = 0x400e0000
0x00000b10: 6a01 .j LDR r1,[r0,#0x20]
0x00000b12: 22ff ." MOVS r2,#0xff
0x00000b14: 3271 q2 ADDS r2,r2,#0x71
0x00000b16: 4391 .C BICS r1,r1,r2
0x00000b18: 6201 .b STR r1,[r0,#0x20]
0x00000b1a: 4770 pG BX lr
ADC_SetExtraSampleTime
0x00000b1c: 4829 )H LDR r0,[pc,#164] ; [0xbc4] = 0x400e0000
0x00000b1e: 3040 @0 ADDS r0,r0,#0x40
0x00000b20: 6881 .h LDR r1,[r0,#8]
0x00000b22: 0909 .. LSRS r1,r1,#4
0x00000b24: 0109 .. LSLS r1,r1,#4
0x00000b26: 4311 .C ORRS r1,r1,r2
0x00000b28: 6081 .` STR r1,[r0,#8]
0x00000b2a: 4770 pG BX lr
ADC_EnableInt
0x00000b2c: 07cb .. LSLS r3,r1,#31
0x00000b2e: 4825 %H LDR r0,[pc,#148] ; [0xbc4] = 0x400e0000
0x00000b30: 2202 ." MOVS r2,#2
0x00000b32: 2b00 .+ CMP r3,#0
0x00000b34: d002 .. BEQ 0xb3c ; ADC_EnableInt + 16
0x00000b36: 6a03 .j LDR r3,[r0,#0x20]
0x00000b38: 4313 .C ORRS r3,r3,r2
0x00000b3a: 6203 .b STR r3,[r0,#0x20]
0x00000b3c: 078b .. LSLS r3,r1,#30
0x00000b3e: d502 .. BPL 0xb46 ; ADC_EnableInt + 26
0x00000b40: 6a83 .j LDR r3,[r0,#0x28]
0x00000b42: 4313 .C ORRS r3,r3,r2
0x00000b44: 6283 .b STR r3,[r0,#0x28]
0x00000b46: 0749 I. LSLS r1,r1,#29
0x00000b48: d502 .. BPL 0xb50 ; ADC_EnableInt + 36
0x00000b4a: 6ac1 .j LDR r1,[r0,#0x2c]
0x00000b4c: 4311 .C ORRS r1,r1,r2
0x00000b4e: 62c1 .b STR r1,[r0,#0x2c]
0x00000b50: 4770 pG BX lr
ADC_DisableInt
0x00000b52: 07cb .. LSLS r3,r1,#31
0x00000b54: 481b .H LDR r0,[pc,#108] ; [0xbc4] = 0x400e0000
0x00000b56: 2202 ." MOVS r2,#2
0x00000b58: 2b00 .+ CMP r3,#0
0x00000b5a: d002 .. BEQ 0xb62 ; ADC_DisableInt + 16
0x00000b5c: 6a03 .j LDR r3,[r0,#0x20]
0x00000b5e: 4393 .C BICS r3,r3,r2
0x00000b60: 6203 .b STR r3,[r0,#0x20]
0x00000b62: 078b .. LSLS r3,r1,#30
0x00000b64: d502 .. BPL 0xb6c ; ADC_DisableInt + 26
0x00000b66: 6a83 .j LDR r3,[r0,#0x28]
0x00000b68: 4393 .C BICS r3,r3,r2
0x00000b6a: 6283 .b STR r3,[r0,#0x28]
0x00000b6c: 0749 I. LSLS r1,r1,#29
0x00000b6e: d502 .. BPL 0xb76 ; ADC_DisableInt + 36
0x00000b70: 6ac1 .j LDR r1,[r0,#0x2c]
0x00000b72: 4391 .C BICS r1,r1,r2
0x00000b74: 62c1 .b STR r1,[r0,#0x2c]
0x00000b76: 4770 pG BX lr
ADC_SeqModeEnable
0x00000b78: 4812 .H LDR r0,[pc,#72] ; [0xbc4] = 0x400e0000
0x00000b7a: b510 .. PUSH {r4,lr}
0x00000b7c: 3040 @0 ADDS r0,r0,#0x40
0x00000b7e: 68c3 .h LDR r3,[r0,#0xc]
0x00000b80: 2401 .$ MOVS r4,#1
0x00000b82: 4323 #C ORRS r3,r3,r4
0x00000b84: 60c3 .` STR r3,[r0,#0xc]
0x00000b86: 68c3 .h LDR r3,[r0,#0xc]
0x00000b88: 2402 .$ MOVS r4,#2
0x00000b8a: 43a3 .C BICS r3,r3,r4
0x00000b8c: 0049 I. LSLS r1,r1,#1
0x00000b8e: 430b .C ORRS r3,r3,r1
0x00000b90: 60c3 .` STR r3,[r0,#0xc]
0x00000b92: 68c1 .h LDR r1,[r0,#0xc]
0x00000b94: 230c .# MOVS r3,#0xc
0x00000b96: 4399 .C BICS r1,r1,r3
0x00000b98: 0092 .. LSLS r2,r2,#2
0x00000b9a: 4311 .C ORRS r1,r1,r2
0x00000b9c: 60c1 .` STR r1,[r0,#0xc]
0x00000b9e: bd10 .. POP {r4,pc}
ADC_SeqModeTriggerSrc
0x00000ba0: 4808 .H LDR r0,[pc,#32] ; [0xbc4] = 0x400e0000
0x00000ba2: b510 .. PUSH {r4,lr}
0x00000ba4: 3040 @0 ADDS r0,r0,#0x40
0x00000ba6: 68c3 .h LDR r3,[r0,#0xc]
0x00000ba8: 240f .$ MOVS r4,#0xf
0x00000baa: 0224 $. LSLS r4,r4,#8
0x00000bac: 43a3 .C BICS r3,r3,r4
0x00000bae: 0209 .. LSLS r1,r1,#8
0x00000bb0: 430b .C ORRS r3,r3,r1
0x00000bb2: 60c3 .` STR r3,[r0,#0xc]
0x00000bb4: 68c1 .h LDR r1,[r0,#0xc]
0x00000bb6: 0223 #. LSLS r3,r4,#8
0x00000bb8: 4399 .C BICS r1,r1,r3
0x00000bba: 0412 .. LSLS r2,r2,#16
0x00000bbc: 4311 .C ORRS r1,r1,r2
0x00000bbe: 60c1 .` STR r1,[r0,#0xc]
0x00000bc0: bd10 .. POP {r4,pc}
$d
0x00000bc2: 0000 .. DCW 0
0x00000bc4: 400e0000 ...@ DCD 1074659328
$t
.text
PWM_ConfigOutputChannel
0x00000bc8: b5ff .. PUSH {r0-r7,lr}
0x00000bca: 48df .H LDR r0,[pc,#892] ; [0xf48] = 0x20000008
0x00000bcc: b083 .. SUB sp,sp,#0xc
0x00000bce: 460f .F MOV r7,r1
0x00000bd0: 6800 .h LDR r0,[r0,#0]
0x00000bd2: 4611 .F MOV r1,r2
0x00000bd4: 9001 .. STR r0,[sp,#4]
0x00000bd6: f000fbf0 .... BL __aeabi_uidiv ; 0x13ba
0x00000bda: 2501 .% MOVS r5,#1
0x00000bdc: 4cdb .L LDR r4,[pc,#876] ; [0xf4c] = 0xffff
0x00000bde: 26ff .& MOVS r6,#0xff
0x00000be0: 9000 .. STR r0,[sp,#0]
0x00000be2: 4629 )F MOV r1,r5
0x00000be4: 9800 .. LDR r0,[sp,#0]
0x00000be6: f000fbe8 .... BL __aeabi_uidiv ; 0x13ba
0x00000bea: 2101 .! MOVS r1,#1
0x00000bec: 0609 .. LSLS r1,r1,#24
0x00000bee: 4288 .B CMP r0,r1
0x00000bf0: d812 .. BHI 0xc18 ; PWM_ConfigOutputChannel + 80
0x00000bf2: 1901 .. ADDS r1,r0,r4
0x00000bf4: 0209 .. LSLS r1,r1,#8
0x00000bf6: 0e0e .. LSRS r6,r1,#24
0x00000bf8: 2e03 .. CMP r6,#3
0x00000bfa: d200 .. BCS 0xbfe ; PWM_ConfigOutputChannel + 54
0x00000bfc: 2602 .& MOVS r6,#2
0x00000bfe: 4631 1F MOV r1,r6
0x00000c00: f000fbdb .... BL __aeabi_uidiv ; 0x13ba
0x00000c04: 2101 .! MOVS r1,#1
0x00000c06: 0409 .. LSLS r1,r1,#16
0x00000c08: 4288 .B CMP r0,r1
0x00000c0a: d805 .. BHI 0xc18 ; PWM_ConfigOutputChannel + 80
0x00000c0c: 2801 .( CMP r0,#1
0x00000c0e: d001 .. BEQ 0xc14 ; PWM_ConfigOutputChannel + 76
0x00000c10: b284 .. UXTH r4,r0
0x00000c12: e005 .. B 0xc20 ; PWM_ConfigOutputChannel + 88
0x00000c14: 2401 .$ MOVS r4,#1
0x00000c16: e003 .. B 0xc20 ; PWM_ConfigOutputChannel + 88
0x00000c18: 0668 h. LSLS r0,r5,#25
0x00000c1a: 0e05 .. LSRS r5,r0,#24
0x00000c1c: 2d11 .- CMP r5,#0x11
0x00000c1e: d3e0 .. BCC 0xbe2 ; PWM_ConfigOutputChannel + 26
0x00000c20: 4631 1F MOV r1,r6
0x00000c22: 4369 iC MULS r1,r5,r1
0x00000c24: 4361 aC MULS r1,r4,r1
0x00000c26: 9801 .. LDR r0,[sp,#4]
0x00000c28: f000fbc7 .... BL __aeabi_uidiv ; 0x13ba
0x00000c2c: 1e76 v. SUBS r6,r6,#1
0x00000c2e: 1e64 d. SUBS r4,r4,#1
0x00000c30: b2f3 .. UXTB r3,r6
0x00000c32: b2a4 .. UXTH r4,r4
0x00000c34: 9000 .. STR r0,[sp,#0]
0x00000c36: 2d01 .- CMP r5,#1
0x00000c38: d02f /. BEQ 0xc9a ; PWM_ConfigOutputChannel + 210
0x00000c3a: 2d02 .- CMP r5,#2
0x00000c3c: d02f /. BEQ 0xc9e ; PWM_ConfigOutputChannel + 214
0x00000c3e: 2d04 .- CMP r5,#4
0x00000c40: d02f /. BEQ 0xca2 ; PWM_ConfigOutputChannel + 218
0x00000c42: 2d08 .- CMP r5,#8
0x00000c44: d02f /. BEQ 0xca6 ; PWM_ConfigOutputChannel + 222
0x00000c46: 2003 . MOVS r0,#3
0x00000c48: 49c1 .I LDR r1,[pc,#772] ; [0xf50] = 0x40040000
0x00000c4a: 680d .h LDR r5,[r1,#0]
0x00000c4c: 087a z. LSRS r2,r7,#1
0x00000c4e: 00d2 .. LSLS r2,r2,#3
0x00000c50: 26ff .& MOVS r6,#0xff
0x00000c52: 4096 .@ LSLS r6,r6,r2
0x00000c54: 43b5 .C BICS r5,r5,r6
0x00000c56: 4093 .@ LSLS r3,r3,r2
0x00000c58: 431d .C ORRS r5,r5,r3
0x00000c5a: 600d .` STR r5,[r1,#0]
0x00000c5c: 684b Kh LDR r3,[r1,#4]
0x00000c5e: 00ba .. LSLS r2,r7,#2
0x00000c60: 2507 .% MOVS r5,#7
0x00000c62: 4095 .@ LSLS r5,r5,r2
0x00000c64: 43ab .C BICS r3,r3,r5
0x00000c66: 4090 .@ LSLS r0,r0,r2
0x00000c68: 4303 .C ORRS r3,r3,r0
0x00000c6a: 604b K` STR r3,[r1,#4]
0x00000c6c: 6888 .h LDR r0,[r1,#8]
0x00000c6e: 2308 .# MOVS r3,#8
0x00000c70: 0040 @. LSLS r0,r0,#1
0x00000c72: 0840 @. LSRS r0,r0,#1
0x00000c74: 4093 .@ LSLS r3,r3,r2
0x00000c76: 4318 .C ORRS r0,r0,r3
0x00000c78: 6088 .` STR r0,[r1,#8]
0x00000c7a: 9903 .. LDR r1,[sp,#0xc]
0x00000c7c: 9806 .. LDR r0,[sp,#0x18]
0x00000c7e: 1855 U. ADDS r5,r2,r1
0x00000c80: 2800 .( CMP r0,#0
0x00000c82: d005 .. BEQ 0xc90 ; PWM_ConfigOutputChannel + 200
0x00000c84: 1c61 a. ADDS r1,r4,#1
0x00000c86: 4348 HC MULS r0,r1,r0
0x00000c88: 2164 d! MOVS r1,#0x64
0x00000c8a: f000fb96 .... BL __aeabi_uidiv ; 0x13ba
0x00000c8e: 1e40 @. SUBS r0,r0,#1
0x00000c90: 6268 hb STR r0,[r5,#0x24]
0x00000c92: 60ec .` STR r4,[r5,#0xc]
0x00000c94: 9800 .. LDR r0,[sp,#0]
0x00000c96: b007 .. ADD sp,sp,#0x1c
0x00000c98: bdf0 .. POP {r4-r7,pc}
0x00000c9a: 2004 . MOVS r0,#4
0x00000c9c: e7d4 .. B 0xc48 ; PWM_ConfigOutputChannel + 128
0x00000c9e: 2000 . MOVS r0,#0
0x00000ca0: e7d2 .. B 0xc48 ; PWM_ConfigOutputChannel + 128
0x00000ca2: 2001 . MOVS r0,#1
0x00000ca4: e7d0 .. B 0xc48 ; PWM_ConfigOutputChannel + 128
0x00000ca6: 2002 . MOVS r0,#2
0x00000ca8: e7ce .. B 0xc48 ; PWM_ConfigOutputChannel + 128
PWM_Start
0x00000caa: b530 0. PUSH {r4,r5,lr}
0x00000cac: 2200 ." MOVS r2,#0
0x00000cae: 4610 .F MOV r0,r2
0x00000cb0: 2401 .$ MOVS r4,#1
0x00000cb2: 4623 #F MOV r3,r4
0x00000cb4: 4083 .@ LSLS r3,r3,r0
0x00000cb6: 420b .B TST r3,r1
0x00000cb8: d003 .. BEQ 0xcc2 ; PWM_Start + 24
0x00000cba: 0085 .. LSLS r5,r0,#2
0x00000cbc: 4623 #F MOV r3,r4
0x00000cbe: 40ab .@ LSLS r3,r3,r5
0x00000cc0: 431a .C ORRS r2,r2,r3
0x00000cc2: 1c40 @. ADDS r0,r0,#1
0x00000cc4: 2806 .( CMP r0,#6
0x00000cc6: d3f4 .. BCC 0xcb2 ; PWM_Start + 8
0x00000cc8: 49a1 .I LDR r1,[pc,#644] ; [0xf50] = 0x40040000
0x00000cca: 6888 .h LDR r0,[r1,#8]
0x00000ccc: 4310 .C ORRS r0,r0,r2
0x00000cce: 6088 .` STR r0,[r1,#8]
0x00000cd0: bd30 0. POP {r4,r5,pc}
PWM_Stop
0x00000cd2: b530 0. PUSH {r4,r5,lr}
0x00000cd4: 2200 ." MOVS r2,#0
0x00000cd6: 2501 .% MOVS r5,#1
0x00000cd8: 4614 .F MOV r4,r2
0x00000cda: 462b +F MOV r3,r5
0x00000cdc: 4093 .@ LSLS r3,r3,r2
0x00000cde: 420b .B TST r3,r1
0x00000ce0: d002 .. BEQ 0xce8 ; PWM_Stop + 22
0x00000ce2: 0093 .. LSLS r3,r2,#2
0x00000ce4: 181b .. ADDS r3,r3,r0
0x00000ce6: 60dc .` STR r4,[r3,#0xc]
0x00000ce8: 1c52 R. ADDS r2,r2,#1
0x00000cea: 2a06 .* CMP r2,#6
0x00000cec: d3f5 .. BCC 0xcda ; PWM_Stop + 8
0x00000cee: bd30 0. POP {r4,r5,pc}
PWM_ForceStop
0x00000cf0: b530 0. PUSH {r4,r5,lr}
0x00000cf2: 2200 ." MOVS r2,#0
0x00000cf4: 4610 .F MOV r0,r2
0x00000cf6: 2401 .$ MOVS r4,#1
0x00000cf8: 4623 #F MOV r3,r4
0x00000cfa: 4083 .@ LSLS r3,r3,r0
0x00000cfc: 420b .B TST r3,r1
0x00000cfe: d003 .. BEQ 0xd08 ; PWM_ForceStop + 24
0x00000d00: 0085 .. LSLS r5,r0,#2
0x00000d02: 4623 #F MOV r3,r4
0x00000d04: 40ab .@ LSLS r3,r3,r5
0x00000d06: 431a .C ORRS r2,r2,r3
0x00000d08: 1c40 @. ADDS r0,r0,#1
0x00000d0a: 2806 .( CMP r0,#6
0x00000d0c: d3f4 .. BCC 0xcf8 ; PWM_ForceStop + 8
0x00000d0e: 4990 .I LDR r1,[pc,#576] ; [0xf50] = 0x40040000
0x00000d10: 6888 .h LDR r0,[r1,#8]
0x00000d12: 4390 .C BICS r0,r0,r2
0x00000d14: 6088 .` STR r0,[r1,#8]
0x00000d16: bd30 0. POP {r4,r5,pc}
PWM_EnableADCTrigger
0x00000d18: b510 .. PUSH {r4,lr}
0x00000d1a: 4c8d .L LDR r4,[pc,#564] ; [0xf50] = 0x40040000
0x00000d1c: 230f .# MOVS r3,#0xf
0x00000d1e: 3440 @4 ADDS r4,r4,#0x40
0x00000d20: 00c8 .. LSLS r0,r1,#3
0x00000d22: 2904 .) CMP r1,#4
0x00000d24: d206 .. BCS 0xd34 ; PWM_EnableADCTrigger + 28
0x00000d26: 6aa1 .j LDR r1,[r4,#0x28]
0x00000d28: 4083 .@ LSLS r3,r3,r0
0x00000d2a: 4399 .C BICS r1,r1,r3
0x00000d2c: 4082 .@ LSLS r2,r2,r0
0x00000d2e: 4311 .C ORRS r1,r1,r2
0x00000d30: 62a1 .b STR r1,[r4,#0x28]
0x00000d32: bd10 .. POP {r4,pc}
0x00000d34: 3820 8 SUBS r0,r0,#0x20
0x00000d36: 6ae1 .j LDR r1,[r4,#0x2c]
0x00000d38: 4083 .@ LSLS r3,r3,r0
0x00000d3a: 4399 .C BICS r1,r1,r3
0x00000d3c: 4082 .@ LSLS r2,r2,r0
0x00000d3e: 4311 .C ORRS r1,r1,r2
0x00000d40: 62e1 .b STR r1,[r4,#0x2c]
0x00000d42: bd10 .. POP {r4,pc}
PWM_DisableADCTrigger
0x00000d44: 4a82 .J LDR r2,[pc,#520] ; [0xf50] = 0x40040000
0x00000d46: 00c8 .. LSLS r0,r1,#3
0x00000d48: 3240 @2 ADDS r2,r2,#0x40
0x00000d4a: 230f .# MOVS r3,#0xf
0x00000d4c: 2904 .) CMP r1,#4
0x00000d4e: d204 .. BCS 0xd5a ; PWM_DisableADCTrigger + 22
0x00000d50: 6a91 .j LDR r1,[r2,#0x28]
0x00000d52: 4083 .@ LSLS r3,r3,r0
0x00000d54: 4399 .C BICS r1,r1,r3
0x00000d56: 6291 .b STR r1,[r2,#0x28]
0x00000d58: 4770 pG BX lr
0x00000d5a: 3820 8 SUBS r0,r0,#0x20
0x00000d5c: 4083 .@ LSLS r3,r3,r0
0x00000d5e: 6ad0 .j LDR r0,[r2,#0x2c]
0x00000d60: 4398 .C BICS r0,r0,r3
0x00000d62: 62d0 .b STR r0,[r2,#0x2c]
0x00000d64: 4770 pG BX lr
PWM_ClearADCTriggerFlag
0x00000d66: 4b7a zK LDR r3,[pc,#488] ; [0xf50] = 0x40040000
0x00000d68: 00c8 .. LSLS r0,r1,#3
0x00000d6a: 3340 @3 ADDS r3,r3,#0x40
0x00000d6c: 2904 .) CMP r1,#4
0x00000d6e: d204 .. BCS 0xd7a ; PWM_ClearADCTriggerFlag + 20
0x00000d70: 6b19 .k LDR r1,[r3,#0x30]
0x00000d72: 4082 .@ LSLS r2,r2,r0
0x00000d74: 4311 .C ORRS r1,r1,r2
0x00000d76: 6319 .c STR r1,[r3,#0x30]
0x00000d78: 4770 pG BX lr
0x00000d7a: 3820 8 SUBS r0,r0,#0x20
0x00000d7c: 4082 .@ LSLS r2,r2,r0
0x00000d7e: 6b58 Xk LDR r0,[r3,#0x34]
0x00000d80: 4302 .C ORRS r2,r2,r0
0x00000d82: 635a Zc STR r2,[r3,#0x34]
0x00000d84: 4770 pG BX lr
PWM_GetADCTriggerFlag
0x00000d86: 4b72 rK LDR r3,[pc,#456] ; [0xf50] = 0x40040000
0x00000d88: 00c8 .. LSLS r0,r1,#3
0x00000d8a: 3340 @3 ADDS r3,r3,#0x40
0x00000d8c: 2904 .) CMP r1,#4
0x00000d8e: d204 .. BCS 0xd9a ; PWM_GetADCTriggerFlag + 20
0x00000d90: 6b19 .k LDR r1,[r3,#0x30]
0x00000d92: 4082 .@ LSLS r2,r2,r0
0x00000d94: 4211 .B TST r1,r2
0x00000d96: d105 .. BNE 0xda4 ; PWM_GetADCTriggerFlag + 30
0x00000d98: e006 .. B 0xda8 ; PWM_GetADCTriggerFlag + 34
0x00000d9a: 3820 8 SUBS r0,r0,#0x20
0x00000d9c: 4082 .@ LSLS r2,r2,r0
0x00000d9e: 6b58 Xk LDR r0,[r3,#0x34]
0x00000da0: 4202 .B TST r2,r0
0x00000da2: d001 .. BEQ 0xda8 ; PWM_GetADCTriggerFlag + 34
0x00000da4: 2001 . MOVS r0,#1
0x00000da6: 4770 pG BX lr
0x00000da8: 2000 . MOVS r0,#0
0x00000daa: 4770 pG BX lr
PWM_EnableFaultBrake
0x00000dac: 0610 .. LSLS r0,r2,#24
0x00000dae: 4968 hI LDR r1,[pc,#416] ; [0xf50] = 0x40040000
0x00000db0: 4318 .C ORRS r0,r0,r3
0x00000db2: 3140 @1 ADDS r1,r1,#0x40
0x00000db4: 6208 .b STR r0,[r1,#0x20]
0x00000db6: 4770 pG BX lr
PWM_ClearFaultBrakeFlag
0x00000db8: 4965 eI LDR r1,[pc,#404] ; [0xf50] = 0x40040000
0x00000dba: 2080 . MOVS r0,#0x80
0x00000dbc: 3140 @1 ADDS r1,r1,#0x40
0x00000dbe: 6208 .b STR r0,[r1,#0x20]
0x00000dc0: 4770 pG BX lr
PWM_EnableOutput
0x00000dc2: 4863 cH LDR r0,[pc,#396] ; [0xf50] = 0x40040000
0x00000dc4: 3040 @0 ADDS r0,r0,#0x40
0x00000dc6: 69c2 .i LDR r2,[r0,#0x1c]
0x00000dc8: 430a .C ORRS r2,r2,r1
0x00000dca: 61c2 .a STR r2,[r0,#0x1c]
0x00000dcc: 4770 pG BX lr
PWM_DisableOutput
0x00000dce: 4860 `H LDR r0,[pc,#384] ; [0xf50] = 0x40040000
0x00000dd0: 3040 @0 ADDS r0,r0,#0x40
0x00000dd2: 69c2 .i LDR r2,[r0,#0x1c]
0x00000dd4: 438a .C BICS r2,r2,r1
0x00000dd6: 61c2 .a STR r2,[r0,#0x1c]
0x00000dd8: 4770 pG BX lr
PWM_EnableDeadZone
0x00000dda: b530 0. PUSH {r4,r5,lr}
0x00000ddc: 4c5c \L LDR r4,[pc,#368] ; [0xf50] = 0x40040000
0x00000dde: 0848 H. LSRS r0,r1,#1
0x00000de0: 3440 @4 ADDS r4,r4,#0x40
0x00000de2: 6a63 cj LDR r3,[r4,#0x24]
0x00000de4: 00c1 .. LSLS r1,r0,#3
0x00000de6: 25ff .% MOVS r5,#0xff
0x00000de8: 408d .@ LSLS r5,r5,r1
0x00000dea: 43ab .C BICS r3,r3,r5
0x00000dec: 408a .@ LSLS r2,r2,r1
0x00000dee: 4313 .C ORRS r3,r3,r2
0x00000df0: 6263 cb STR r3,[r4,#0x24]
0x00000df2: 0323 #. LSLS r3,r4,#12
0x00000df4: 689a .h LDR r2,[r3,#8]
0x00000df6: 0199 .. LSLS r1,r3,#6
0x00000df8: 4081 .@ LSLS r1,r1,r0
0x00000dfa: 430a .C ORRS r2,r2,r1
0x00000dfc: 609a .` STR r2,[r3,#8]
0x00000dfe: bd30 0. POP {r4,r5,pc}
PWM_DisableDeadZone
0x00000e00: 0848 H. LSRS r0,r1,#1
0x00000e02: 4953 SI LDR r1,[pc,#332] ; [0xf50] = 0x40040000
0x00000e04: 688a .h LDR r2,[r1,#8]
0x00000e06: 018b .. LSLS r3,r1,#6
0x00000e08: 4083 .@ LSLS r3,r3,r0
0x00000e0a: 439a .C BICS r2,r2,r3
0x00000e0c: 608a .` STR r2,[r1,#8]
0x00000e0e: 4770 pG BX lr
PWM_EnableDutyInt
0x00000e10: 6d42 Bm LDR r2,[r0,#0x54]
0x00000e12: 23ff .# MOVS r3,#0xff
0x00000e14: 3301 .3 ADDS r3,#1
0x00000e16: 408b .@ LSLS r3,r3,r1
0x00000e18: 431a .C ORRS r2,r2,r3
0x00000e1a: 6542 Be STR r2,[r0,#0x54]
0x00000e1c: 4770 pG BX lr
PWM_DisableDutyInt
0x00000e1e: 6d42 Bm LDR r2,[r0,#0x54]
0x00000e20: 23ff .# MOVS r3,#0xff
0x00000e22: 3301 .3 ADDS r3,#1
0x00000e24: 408b .@ LSLS r3,r3,r1
0x00000e26: 439a .C BICS r2,r2,r3
0x00000e28: 6542 Be STR r2,[r0,#0x54]
0x00000e2a: 4770 pG BX lr
PWM_ClearDutyIntFlag
0x00000e2c: 20ff . MOVS r0,#0xff
0x00000e2e: 3001 .0 ADDS r0,#1
0x00000e30: 4088 .@ LSLS r0,r0,r1
0x00000e32: 4947 GI LDR r1,[pc,#284] ; [0xf50] = 0x40040000
0x00000e34: 3140 @1 ADDS r1,r1,#0x40
0x00000e36: 6188 .a STR r0,[r1,#0x18]
0x00000e38: 4770 pG BX lr
PWM_GetDutyIntFlag
0x00000e3a: 4845 EH LDR r0,[pc,#276] ; [0xf50] = 0x40040000
0x00000e3c: 3040 @0 ADDS r0,r0,#0x40
0x00000e3e: 6980 .i LDR r0,[r0,#0x18]
0x00000e40: 22ff ." MOVS r2,#0xff
0x00000e42: 3201 .2 ADDS r2,#1
0x00000e44: 408a .@ LSLS r2,r2,r1
0x00000e46: 4010 .@ ANDS r0,r0,r2
0x00000e48: d000 .. BEQ 0xe4c ; PWM_GetDutyIntFlag + 18
0x00000e4a: 2001 . MOVS r0,#1
0x00000e4c: 4770 pG BX lr
PWM_EnablePeriodInt
0x00000e4e: 6d42 Bm LDR r2,[r0,#0x54]
0x00000e50: 2301 .# MOVS r3,#1
0x00000e52: 408b .@ LSLS r3,r3,r1
0x00000e54: 431a .C ORRS r2,r2,r3
0x00000e56: 6542 Be STR r2,[r0,#0x54]
0x00000e58: 4770 pG BX lr
PWM_DisablePeriodInt
0x00000e5a: 6d42 Bm LDR r2,[r0,#0x54]
0x00000e5c: 2301 .# MOVS r3,#1
0x00000e5e: 408b .@ LSLS r3,r3,r1
0x00000e60: 439a .C BICS r2,r2,r3
0x00000e62: 6542 Be STR r2,[r0,#0x54]
0x00000e64: 4770 pG BX lr
PWM_ClearPeriodIntFlag
0x00000e66: 2001 . MOVS r0,#1
0x00000e68: 4088 .@ LSLS r0,r0,r1
0x00000e6a: 4939 9I LDR r1,[pc,#228] ; [0xf50] = 0x40040000
0x00000e6c: 3140 @1 ADDS r1,r1,#0x40
0x00000e6e: 6188 .a STR r0,[r1,#0x18]
0x00000e70: 4770 pG BX lr
PWM_GetPeriodIntFlag
0x00000e72: 4837 7H LDR r0,[pc,#220] ; [0xf50] = 0x40040000
0x00000e74: 3040 @0 ADDS r0,r0,#0x40
0x00000e76: 6980 .i LDR r0,[r0,#0x18]
0x00000e78: 2201 ." MOVS r2,#1
0x00000e7a: 408a .@ LSLS r2,r2,r1
0x00000e7c: 4010 .@ ANDS r0,r0,r2
0x00000e7e: d000 .. BEQ 0xe82 ; PWM_GetPeriodIntFlag + 16
0x00000e80: 2001 . MOVS r0,#1
0x00000e82: 4770 pG BX lr
PWM_EnableRiseInt
0x00000e84: 6d42 Bm LDR r2,[r0,#0x54]
0x00000e86: 2301 .# MOVS r3,#1
0x00000e88: 061b .. LSLS r3,r3,#24
0x00000e8a: 408b .@ LSLS r3,r3,r1
0x00000e8c: 431a .C ORRS r2,r2,r3
0x00000e8e: 6542 Be STR r2,[r0,#0x54]
0x00000e90: 4770 pG BX lr
PWM_DisableRiseInt
0x00000e92: 6d42 Bm LDR r2,[r0,#0x54]
0x00000e94: 2301 .# MOVS r3,#1
0x00000e96: 061b .. LSLS r3,r3,#24
0x00000e98: 408b .@ LSLS r3,r3,r1
0x00000e9a: 439a .C BICS r2,r2,r3
0x00000e9c: 6542 Be STR r2,[r0,#0x54]
0x00000e9e: 4770 pG BX lr
PWM_ClearRiseIntFlag
0x00000ea0: 2001 . MOVS r0,#1
0x00000ea2: 0600 .. LSLS r0,r0,#24
0x00000ea4: 4088 .@ LSLS r0,r0,r1
0x00000ea6: 492a *I LDR r1,[pc,#168] ; [0xf50] = 0x40040000
0x00000ea8: 3140 @1 ADDS r1,r1,#0x40
0x00000eaa: 6188 .a STR r0,[r1,#0x18]
0x00000eac: 4770 pG BX lr
PWM_GetRiseIntFlag
0x00000eae: 4828 (H LDR r0,[pc,#160] ; [0xf50] = 0x40040000
0x00000eb0: 3040 @0 ADDS r0,r0,#0x40
0x00000eb2: 6980 .i LDR r0,[r0,#0x18]
0x00000eb4: 2201 ." MOVS r2,#1
0x00000eb6: 0612 .. LSLS r2,r2,#24
0x00000eb8: 408a .@ LSLS r2,r2,r1
0x00000eba: 4010 .@ ANDS r0,r0,r2
0x00000ebc: d000 .. BEQ 0xec0 ; PWM_GetRiseIntFlag + 18
0x00000ebe: 2001 . MOVS r0,#1
0x00000ec0: 4770 pG BX lr
PWM_EnableFaultBrakeInt
0x00000ec2: 4823 #H LDR r0,[pc,#140] ; [0xf50] = 0x40040000
0x00000ec4: 3040 @0 ADDS r0,r0,#0x40
0x00000ec6: 6941 Ai LDR r1,[r0,#0x14]
0x00000ec8: 2201 ." MOVS r2,#1
0x00000eca: 0412 .. LSLS r2,r2,#16
0x00000ecc: 4311 .C ORRS r1,r1,r2
0x00000ece: 6141 Aa STR r1,[r0,#0x14]
0x00000ed0: 4770 pG BX lr
PWM_DisableFaultBrakeInt
0x00000ed2: 481f .H LDR r0,[pc,#124] ; [0xf50] = 0x40040000
0x00000ed4: 3040 @0 ADDS r0,r0,#0x40
0x00000ed6: 6941 Ai LDR r1,[r0,#0x14]
0x00000ed8: 2201 ." MOVS r2,#1
0x00000eda: 0412 .. LSLS r2,r2,#16
0x00000edc: 4391 .C BICS r1,r1,r2
0x00000ede: 6141 Aa STR r1,[r0,#0x14]
0x00000ee0: 4770 pG BX lr
PWM_ClearFaultBrakeIntFlag
0x00000ee2: 481b .H LDR r0,[pc,#108] ; [0xf50] = 0x40040000
0x00000ee4: 3040 @0 ADDS r0,r0,#0x40
0x00000ee6: 6181 .a STR r1,[r0,#0x18]
0x00000ee8: 4770 pG BX lr
PWM_GetFaultBrakeIntFlag
0x00000eea: 4819 .H LDR r0,[pc,#100] ; [0xf50] = 0x40040000
0x00000eec: 3040 @0 ADDS r0,r0,#0x40
0x00000eee: 6980 .i LDR r0,[r0,#0x18]
0x00000ef0: 4008 .@ ANDS r0,r0,r1
0x00000ef2: d000 .. BEQ 0xef6 ; PWM_GetFaultBrakeIntFlag + 12
0x00000ef4: 2001 . MOVS r0,#1
0x00000ef6: 4770 pG BX lr
PWM_EnableCenterInt
0x00000ef8: b510 .. PUSH {r4,lr}
0x00000efa: 4c15 .L LDR r4,[pc,#84] ; [0xf50] = 0x40040000
0x00000efc: 3440 @4 ADDS r4,r4,#0x40
0x00000efe: 6963 ci LDR r3,[r4,#0x14]
0x00000f00: 2001 . MOVS r0,#1
0x00000f02: 0480 .. LSLS r0,r0,#18
0x00000f04: 4088 .@ LSLS r0,r0,r1
0x00000f06: 4913 .I LDR r1,[pc,#76] ; [0xf54] = 0xfffdffff
0x00000f08: 4381 .C BICS r1,r1,r0
0x00000f0a: 400b .@ ANDS r3,r3,r1
0x00000f0c: 4303 .C ORRS r3,r3,r0
0x00000f0e: 4313 .C ORRS r3,r3,r2
0x00000f10: 6163 ca STR r3,[r4,#0x14]
0x00000f12: bd10 .. POP {r4,pc}
PWM_DisableCenterInt
0x00000f14: 480e .H LDR r0,[pc,#56] ; [0xf50] = 0x40040000
0x00000f16: 3040 @0 ADDS r0,r0,#0x40
0x00000f18: 6942 Bi LDR r2,[r0,#0x14]
0x00000f1a: 2301 .# MOVS r3,#1
0x00000f1c: 049b .. LSLS r3,r3,#18
0x00000f1e: 408b .@ LSLS r3,r3,r1
0x00000f20: 439a .C BICS r2,r2,r3
0x00000f22: 6142 Ba STR r2,[r0,#0x14]
0x00000f24: 4770 pG BX lr
PWM_ClearCenterIntFlag
0x00000f26: 2001 . MOVS r0,#1
0x00000f28: 0480 .. LSLS r0,r0,#18
0x00000f2a: 4088 .@ LSLS r0,r0,r1
0x00000f2c: 4908 .I LDR r1,[pc,#32] ; [0xf50] = 0x40040000
0x00000f2e: 3140 @1 ADDS r1,r1,#0x40
0x00000f30: 6188 .a STR r0,[r1,#0x18]
0x00000f32: 4770 pG BX lr
PWM_GetCenterIntFlag
0x00000f34: 4806 .H LDR r0,[pc,#24] ; [0xf50] = 0x40040000
0x00000f36: 3040 @0 ADDS r0,r0,#0x40
0x00000f38: 6980 .i LDR r0,[r0,#0x18]
0x00000f3a: 2201 ." MOVS r2,#1
0x00000f3c: 0492 .. LSLS r2,r2,#18
0x00000f3e: 408a .@ LSLS r2,r2,r1
0x00000f40: 4010 .@ ANDS r0,r0,r2
0x00000f42: d000 .. BEQ 0xf46 ; PWM_GetCenterIntFlag + 18
0x00000f44: 2001 . MOVS r0,#1
0x00000f46: 4770 pG BX lr
$d
0x00000f48: 20000008 ... DCD 536870920
0x00000f4c: 0000ffff .... DCD 65535
0x00000f50: 40040000 ...@ DCD 1074003968
0x00000f54: fffdffff .... DCD 4294836223
$t
.text
ADC_IRQHandler
0x00000f58: b570 p. PUSH {r4-r6,lr}
0x00000f5a: 4c5f _L LDR r4,[pc,#380] ; [0x10d8] = 0x400e0000
0x00000f5c: 6b20 k LDR r0,[r4,#0x30]
0x00000f5e: 07c5 .. LSLS r5,r0,#31
0x00000f60: 6820 h LDR r0,[r4,#0]
0x00000f62: 0fed .. LSRS r5,r5,#31
0x00000f64: 4b5d ]K LDR r3,[pc,#372] ; [0x10dc] = 0x20000014
0x00000f66: 0582 .. LSLS r2,r0,#22
0x00000f68: 7819 .x LDRB r1,[r3,#0]
0x00000f6a: 0d92 .. LSRS r2,r2,#22
0x00000f6c: 1c48 H. ADDS r0,r1,#1
0x00000f6e: 7018 .p STRB r0,[r3,#0]
0x00000f70: a05b [. ADR r0,{pc}+0x170 ; 0x10e0
0x00000f72: f000f92b ..+. BL __2printf ; 0x11cc
0x00000f76: 6b20 k LDR r0,[r4,#0x30]
0x00000f78: 08c0 .. LSRS r0,r0,#3
0x00000f7a: 00c0 .. LSLS r0,r0,#3
0x00000f7c: 4328 (C ORRS r0,r0,r5
0x00000f7e: 6320 c STR r0,[r4,#0x30]
0x00000f80: bd70 p. POP {r4-r6,pc}
SYS_Init
0x00000f82: b570 p. PUSH {r4-r6,lr}
0x00000f84: 2059 Y MOVS r0,#0x59
0x00000f86: 4c5e ^L LDR r4,[pc,#376] ; [0x1100] = 0x50000100
0x00000f88: 2116 .! MOVS r1,#0x16
0x00000f8a: 2288 ." MOVS r2,#0x88
0x00000f8c: 6020 ` STR r0,[r4,#0]
0x00000f8e: 6021 !` STR r1,[r4,#0]
0x00000f90: 6022 "` STR r2,[r4,#0]
0x00000f92: 6823 #h LDR r3,[r4,#0]
0x00000f94: 2b00 .+ CMP r3,#0
0x00000f96: d0f9 .. BEQ 0xf8c ; SYS_Init + 10
0x00000f98: 495a ZI LDR r1,[pc,#360] ; [0x1104] = 0x50000200
0x00000f9a: 2004 . MOVS r0,#4
0x00000f9c: 6008 .` STR r0,[r1,#0]
0x00000f9e: 2010 . MOVS r0,#0x10
0x00000fa0: f7fffba2 .... BL CLK_WaitClockReady ; 0x6e8
0x00000fa4: 2100 .! MOVS r1,#0
0x00000fa6: 2007 . MOVS r0,#7
0x00000fa8: f7fffb8f .... BL CLK_SetHCLK ; 0x6ca
0x00000fac: 4856 VH LDR r0,[pc,#344] ; [0x1108] = 0x2dc6c00
0x00000fae: f7fffc9c .... BL CLK_SetCoreClock ; 0x8ea
0x00000fb2: 2007 . MOVS r0,#7
0x00000fb4: f7fffcfb .... BL CLK_SetSysTickClockSrc ; 0x9ae
0x00000fb8: 4854 TH LDR r0,[pc,#336] ; [0x110c] = 0xa7803d10
0x00000fba: f7fffd2c ..,. BL CLK_EnableModuleClock ; 0xa16
0x00000fbe: 4853 SH LDR r0,[pc,#332] ; [0x110c] = 0xa7803d10
0x00000fc0: 1c40 @. ADDS r0,r0,#1
0x00000fc2: f7fffd28 ..(. BL CLK_EnableModuleClock ; 0xa16
0x00000fc6: 4d52 RM LDR r5,[pc,#328] ; [0x1110] = 0xa623fe1c
0x00000fc8: 4628 (F MOV r0,r5
0x00000fca: f7fffd24 ..$. BL CLK_EnableModuleClock ; 0xa16
0x00000fce: 2205 ." MOVS r2,#5
0x00000fd0: 0412 .. LSLS r2,r2,#16
0x00000fd2: 2108 .! MOVS r1,#8
0x00000fd4: 4628 (F MOV r0,r5
0x00000fd6: f7fffcc4 .... BL CLK_SetModuleClock ; 0x962
0x00000fda: 484e NH LDR r0,[pc,#312] ; [0x1114] = 0xa7c00014
0x00000fdc: f7fffd1b .... BL CLK_EnableModuleClock ; 0xa16
0x00000fe0: 484d MH LDR r0,[pc,#308] ; [0x1118] = 0xa7e00015
0x00000fe2: f7fffd18 .... BL CLK_EnableModuleClock ; 0xa16
0x00000fe6: f7fff8d8 .... BL SystemCoreClockUpdate ; 0x19a
0x00000fea: 213d =! MOVS r1,#0x3d
0x00000fec: 2005 . MOVS r0,#5
0x00000fee: 0700 .. LSLS r0,r0,#28
0x00000ff0: 6341 Ac STR r1,[r0,#0x34]
0x00000ff2: 4943 CI LDR r1,[pc,#268] ; [0x1100] = 0x50000100
0x00000ff4: 4a49 IJ LDR r2,[pc,#292] ; [0x111c] = 0x303
0x00000ff6: 39c0 .9 SUBS r1,r1,#0xc0
0x00000ff8: 604a J` STR r2,[r1,#4]
0x00000ffa: 2203 ." MOVS r2,#3
0x00000ffc: 0392 .. LSLS r2,r2,#14
0x00000ffe: 600a .` STR r2,[r1,#0]
0x00001000: 210f .! MOVS r1,#0xf
0x00001002: 0289 .. LSLS r1,r1,#10
0x00001004: 6381 .c STR r1,[r0,#0x38]
0x00001006: 4846 FH LDR r0,[pc,#280] ; [0x1120] = 0x50004040
0x00001008: 6841 Ah LDR r1,[r0,#4]
0x0000100a: 221f ." MOVS r2,#0x1f
0x0000100c: 0452 R. LSLS r2,r2,#17
0x0000100e: 4311 .C ORRS r1,r1,r2
0x00001010: 6041 A` STR r1,[r0,#4]
0x00001012: 2000 . MOVS r0,#0
0x00001014: 6020 ` STR r0,[r4,#0]
0x00001016: 24e1 .$ MOVS r4,#0xe1
0x00001018: 0264 d. LSLS r4,r4,#9
0x0000101a: 4621 !F MOV r1,r4
0x0000101c: 4841 AH LDR r0,[pc,#260] ; [0x1124] = 0x40050000
0x0000101e: f7fffa13 .... BL UART_Open ; 0x448
0x00001022: 4621 !F MOV r1,r4
0x00001024: 4840 @H LDR r0,[pc,#256] ; [0x1128] = 0x40150000
0x00001026: f7fffa0f .... BL UART_Open ; 0x448
0x0000102a: 482b +H LDR r0,[pc,#172] ; [0x10d8] = 0x400e0000
0x0000102c: 6a01 .j LDR r1,[r0,#0x20]
0x0000102e: 2201 ." MOVS r2,#1
0x00001030: 4311 .C ORRS r1,r1,r2
0x00001032: 6201 .b STR r1,[r0,#0x20]
0x00001034: 4611 .F MOV r1,r2
0x00001036: f7fffd79 ..y. BL ADC_EnableInt ; 0xb2c
0x0000103a: 493c <I LDR r1,[pc,#240] ; [0x112c] = 0xe000e100
0x0000103c: 0520 . LSLS r0,r4,#20
0x0000103e: 6008 .` STR r0,[r1,#0]
0x00001040: 213f ?! MOVS r1,#0x3f
0x00001042: 483b ;H LDR r0,[pc,#236] ; [0x1130] = 0x40040000
0x00001044: f7fffebd .... BL PWM_EnableOutput ; 0xdc2
0x00001048: bd70 p. POP {r4-r6,pc}
main
0x0000104a: b508 .. PUSH {r3,lr}
0x0000104c: a039 9. ADR r0,{pc}+0xe8 ; 0x1134
0x0000104e: 6800 .h LDR r0,[r0,#0]
0x00001050: 9000 .. STR r0,[sp,#0]
0x00001052: f7ffff96 .... BL SYS_Init ; 0xf82
0x00001056: 2204 ." MOVS r2,#4
0x00001058: 4669 iF MOV r1,sp
0x0000105a: 4833 3H LDR r0,[pc,#204] ; [0x1128] = 0x40150000
0x0000105c: f7fffac9 .... BL UART_Write ; 0x5f2
0x00001060: a035 5. ADR r0,{pc}+0xd8 ; 0x1138
0x00001062: f000f8b3 .... BL __2printf ; 0x11cc
0x00001066: 4c38 8L LDR r4,[pc,#224] ; [0x1148] = 0x47b
0x00001068: 4d31 1M LDR r5,[pc,#196] ; [0x1130] = 0x40040000
0x0000106a: 231e .# MOVS r3,#0x1e
0x0000106c: 4622 "F MOV r2,r4
0x0000106e: 2100 .! MOVS r1,#0
0x00001070: 4628 (F MOV r0,r5
0x00001072: f7fffda9 .... BL PWM_ConfigOutputChannel ; 0xbc8
0x00001076: 233c <# MOVS r3,#0x3c
0x00001078: 4622 "F MOV r2,r4
0x0000107a: 2101 .! MOVS r1,#1
0x0000107c: 4628 (F MOV r0,r5
0x0000107e: f7fffda3 .... BL PWM_ConfigOutputChannel ; 0xbc8
0x00001082: 2350 P# MOVS r3,#0x50
0x00001084: 4622 "F MOV r2,r4
0x00001086: 2102 .! MOVS r1,#2
0x00001088: 4628 (F MOV r0,r5
0x0000108a: f7fffd9d .... BL PWM_ConfigOutputChannel ; 0xbc8
0x0000108e: 2332 2# MOVS r3,#0x32
0x00001090: 4622 "F MOV r2,r4
0x00001092: 2103 .! MOVS r1,#3
0x00001094: 4628 (F MOV r0,r5
0x00001096: f7fffd97 .... BL PWM_ConfigOutputChannel ; 0xbc8
0x0000109a: 213f ?! MOVS r1,#0x3f
0x0000109c: 4628 (F MOV r0,r5
0x0000109e: f7fffe04 .... BL PWM_Start ; 0xcaa
0x000010a2: 2501 .% MOVS r5,#1
0x000010a4: 4c0d .L LDR r4,[pc,#52] ; [0x10dc] = 0x20000014
0x000010a6: 4e0c .N LDR r6,[pc,#48] ; [0x10d8] = 0x400e0000
0x000010a8: 02ef .. LSLS r7,r5,#11
0x000010aa: 7820 x LDRB r0,[r4,#0]
0x000010ac: 2805 .( CMP r0,#5
0x000010ae: d900 .. BLS 0x10b2 ; main + 104
0x000010b0: 7025 %p STRB r5,[r4,#0]
0x000010b2: 7820 x LDRB r0,[r4,#0]
0x000010b4: 462b +F MOV r3,r5
0x000010b6: 4083 .@ LSLS r3,r3,r0
0x000010b8: 2200 ." MOVS r2,#0
0x000010ba: 4611 .F MOV r1,r2
0x000010bc: 4630 0F MOV r0,r6
0x000010be: f7fffcf9 .... BL ADC_Open ; 0xab4
0x000010c2: 6b30 0k LDR r0,[r6,#0x30]
0x000010c4: 0700 .. LSLS r0,r0,#28
0x000010c6: d402 .. BMI 0x10ce ; main + 132
0x000010c8: 6a30 0j LDR r0,[r6,#0x20]
0x000010ca: 4338 8C ORRS r0,r0,r7
0x000010cc: 6230 0b STR r0,[r6,#0x20]
0x000010ce: 20ff . MOVS r0,#0xff
0x000010d0: 302d -0 ADDS r0,r0,#0x2d
0x000010d2: f000f86c ..l. BL delay_ms ; 0x11ae
0x000010d6: e7e8 .. B 0x10aa ; main + 96
$d
0x000010d8: 400e0000 ...@ DCD 1074659328
0x000010dc: 20000014 ... DCD 536870932
0x000010e0: 766e6f43 Conv DCD 1986948931
0x000010e4: 20747265 ert DCD 544502373
0x000010e8: 25204843 CH % DCD 622872643
0x000010ec: 65722064 d re DCD 1701978212
0x000010f0: 746c7573 sult DCD 1953265011
0x000010f4: 20736920 is DCD 544434464
0x000010f8: 0a206425 %d . DCD 169894949
0x000010fc: 00000000 .... DCD 0
0x00001100: 50000100 ...P DCD 1342177536
0x00001104: 50000200 ...P DCD 1342177792
0x00001108: 02dc6c00 .l.. DCD 48000000
0x0000110c: a7803d10 .=.. DCD 2810199312
0x00001110: a623fe1c ..#. DCD 2787376668
0x00001114: a7c00014 .... DCD 2814378004
0x00001118: a7e00015 .... DCD 2816475157
0x0000111c: 00000303 .... DCD 771
0x00001120: 50004040 @@.P DCD 1342193728
0x00001124: 40050000 ...@ DCD 1074069504
0x00001128: 40150000 ...@ DCD 1075118080
0x0000112c: e000e100 .... DCD 3758153984
0x00001130: 40040000 ...@ DCD 1074003968
0x00001134: 04030201 .... DCD 67305985
0x00001138: 6c6c6548 Hell DCD 1819043144
0x0000113c: 6f57206f o Wo DCD 1867980911
0x00001140: 0a646c72 rld. DCD 174353522
0x00001144: 00000000 .... DCD 0
0x00001148: 0000047b {... DCD 1147
$t
.text
delay_us
0x0000114c: 2100 .! MOVS r1,#0
0x0000114e: e02b +. B 0x11a8 ; delay_us + 92
0x00001150: bf00 .. NOP
0x00001152: bf00 .. NOP
0x00001154: bf00 .. NOP
0x00001156: bf00 .. NOP
0x00001158: bf00 .. NOP
0x0000115a: bf00 .. NOP
0x0000115c: bf00 .. NOP
0x0000115e: bf00 .. NOP
0x00001160: bf00 .. NOP
0x00001162: bf00 .. NOP
0x00001164: bf00 .. NOP
0x00001166: bf00 .. NOP
0x00001168: bf00 .. NOP
0x0000116a: bf00 .. NOP
0x0000116c: bf00 .. NOP
0x0000116e: bf00 .. NOP
0x00001170: bf00 .. NOP
0x00001172: bf00 .. NOP
0x00001174: bf00 .. NOP
0x00001176: bf00 .. NOP
0x00001178: bf00 .. NOP
0x0000117a: bf00 .. NOP
0x0000117c: bf00 .. NOP
0x0000117e: bf00 .. NOP
0x00001180: bf00 .. NOP
0x00001182: bf00 .. NOP
0x00001184: bf00 .. NOP
0x00001186: bf00 .. NOP
0x00001188: bf00 .. NOP
0x0000118a: bf00 .. NOP
0x0000118c: bf00 .. NOP
0x0000118e: bf00 .. NOP
0x00001190: bf00 .. NOP
0x00001192: bf00 .. NOP
0x00001194: bf00 .. NOP
0x00001196: bf00 .. NOP
0x00001198: bf00 .. NOP
0x0000119a: bf00 .. NOP
0x0000119c: bf00 .. NOP
0x0000119e: bf00 .. NOP
0x000011a0: bf00 .. NOP
0x000011a2: bf00 .. NOP
0x000011a4: 1c49 I. ADDS r1,r1,#1
0x000011a6: b289 .. UXTH r1,r1
0x000011a8: 4281 .B CMP r1,r0
0x000011aa: d3d1 .. BCC 0x1150 ; delay_us + 4
0x000011ac: 4770 pG BX lr
delay_ms
0x000011ae: b510 .. PUSH {r4,lr}
0x000011b0: 2200 ." MOVS r2,#0
0x000011b2: 247d }$ MOVS r4,#0x7d
0x000011b4: 4603 .F MOV r3,r0
0x000011b6: 00e4 .. LSLS r4,r4,#3
0x000011b8: e004 .. B 0x11c4 ; delay_ms + 22
0x000011ba: 4620 F MOV r0,r4
0x000011bc: f7ffffc6 .... BL delay_us ; 0x114c
0x000011c0: 1c52 R. ADDS r2,r2,#1
0x000011c2: b292 .. UXTH r2,r2
0x000011c4: 429a .B CMP r2,r3
0x000011c6: d3f8 .. BCC 0x11ba ; delay_ms + 12
0x000011c8: bd10 .. POP {r4,pc}
0x000011ca: 0000 .. MOVS r0,r0
.text
__2printf
0x000011cc: b40f .. PUSH {r0-r3}
0x000011ce: 4905 .I LDR r1,[pc,#20] ; [0x11e4] = 0x20000010
0x000011d0: b510 .. PUSH {r4,lr}
0x000011d2: aa03 .. ADD r2,sp,#0xc
0x000011d4: 9802 .. LDR r0,[sp,#8]
0x000011d6: f000f9f9 .... BL _printf_char_file ; 0x15cc
0x000011da: bc10 .. POP {r4}
0x000011dc: bc08 .. POP {r3}
0x000011de: b004 .. ADD sp,sp,#0x10
0x000011e0: 4718 .G BX r3
$d
0x000011e2: 0000 .. DCW 0
0x000011e4: 20000010 ... DCD 536870928
$t
.text
_printf_int_dec
0x000011e8: b5f7 .. PUSH {r0-r2,r4-r7,lr}
0x000011ea: 2500 .% MOVS r5,#0
0x000011ec: 2975 u) CMP r1,#0x75
0x000011ee: 6810 .h LDR r0,[r2,#0]
0x000011f0: 9900 .. LDR r1,[sp,#0]
0x000011f2: a614 .. ADR r6,{pc}+0x52 ; 0x1244
0x000011f4: d011 .. BEQ 0x121a ; _printf_int_dec + 50
0x000011f6: 46c0 .F MOV r8,r8
0x000011f8: 46c0 .F MOV r8,r8
0x000011fa: 2800 .( CMP r0,#0
0x000011fc: da02 .. BGE 0x1204 ; _printf_int_dec + 28
0x000011fe: 4240 @B RSBS r0,r0,#0
0x00001200: a611 .. ADR r6,{pc}+0x48 ; 0x1248
0x00001202: e008 .. B 0x1216 ; _printf_int_dec + 46
0x00001204: 9900 .. LDR r1,[sp,#0]
0x00001206: 6809 .h LDR r1,[r1,#0]
0x00001208: 078a .. LSLS r2,r1,#30
0x0000120a: d501 .. BPL 0x1210 ; _printf_int_dec + 40
0x0000120c: a60f .. ADR r6,{pc}+0x40 ; 0x124c
0x0000120e: e002 .. B 0x1216 ; _printf_int_dec + 46
0x00001210: 0749 I. LSLS r1,r1,#29
0x00001212: d504 .. BPL 0x121e ; _printf_int_dec + 54
0x00001214: a60e .. ADR r6,{pc}+0x3c ; 0x1250
0x00001216: 2501 .% MOVS r5,#1
0x00001218: e001 .. B 0x121e ; _printf_int_dec + 54
0x0000121a: 46c0 .F MOV r8,r8
0x0000121c: 46c0 .F MOV r8,r8
0x0000121e: 9f00 .. LDR r7,[sp,#0]
0x00001220: 2400 .$ MOVS r4,#0
0x00001222: 3724 $7 ADDS r7,r7,#0x24
0x00001224: e004 .. B 0x1230 ; _printf_int_dec + 72
0x00001226: f000f9e5 .... BL __rt_udiv10 ; 0x15f4
0x0000122a: 3130 01 ADDS r1,r1,#0x30
0x0000122c: 5539 9U STRB r1,[r7,r4]
0x0000122e: 1c64 d. ADDS r4,r4,#1
0x00001230: 2800 .( CMP r0,#0
0x00001232: d1f8 .. BNE 0x1226 ; _printf_int_dec + 62
0x00001234: 462b +F MOV r3,r5
0x00001236: 4632 2F MOV r2,r6
0x00001238: 4621 !F MOV r1,r4
0x0000123a: 9800 .. LDR r0,[sp,#0]
0x0000123c: f000f96d ..m. BL _printf_int_common ; 0x151a
0x00001240: bdfe .. POP {r1-r7,pc}
$d
0x00001242: 0000 .. DCW 0
0x00001244: 00000000 .... DCD 0
0x00001248: 0000002d -... DCD 45
0x0000124c: 0000002b +... DCD 43
0x00001250: 00000020 ... DCD 32
$t
.text
_printf_int_hex
_printf_longlong_hex
0x00001254: b570 p. PUSH {r4-r6,lr}
0x00001256: 4604 .F MOV r4,r0
0x00001258: 460d .F MOV r5,r1
0x0000125a: 4621 !F MOV r1,r4
0x0000125c: 6810 .h LDR r0,[r2,#0]
0x0000125e: 46c0 .F MOV r8,r8
0x00001260: 46c0 .F MOV r8,r8
0x00001262: 8821 !. LDRH r1,[r4,#0]
0x00001264: 0509 .. LSLS r1,r1,#20
0x00001266: d502 .. BPL 0x126e ; _printf_int_hex + 26
0x00001268: 4a0f .J LDR r2,[pc,#60] ; [0x12a8] = 0x452
0x0000126a: 447a zD ADD r2,r2,pc
0x0000126c: e002 .. B 0x1274 ; _printf_int_hex + 32
0x0000126e: 4a0e .J LDR r2,[pc,#56] ; [0x12a8] = 0x452
0x00001270: 447a zD ADD r2,r2,pc
0x00001272: 320e .2 ADDS r2,r2,#0xe
0x00001274: 4623 #F MOV r3,r4
0x00001276: 2100 .! MOVS r1,#0
0x00001278: 3324 $3 ADDS r3,r3,#0x24
0x0000127a: e005 .. B 0x1288 ; _printf_int_hex + 52
0x0000127c: 0706 .. LSLS r6,r0,#28
0x0000127e: 0900 .. LSRS r0,r0,#4
0x00001280: 0f36 6. LSRS r6,r6,#28
0x00001282: 5d96 .] LDRB r6,[r2,r6]
0x00001284: 545e ^T STRB r6,[r3,r1]
0x00001286: 1c49 I. ADDS r1,r1,#1
0x00001288: 2800 .( CMP r0,#0
0x0000128a: d1f7 .. BNE 0x127c ; _printf_int_hex + 40
0x0000128c: 7820 x LDRB r0,[r4,#0]
0x0000128e: 2300 .# MOVS r3,#0
0x00001290: 0700 .. LSLS r0,r0,#28
0x00001292: d505 .. BPL 0x12a0 ; _printf_int_hex + 76
0x00001294: 2d70 p- CMP r5,#0x70
0x00001296: d003 .. BEQ 0x12a0 ; _printf_int_hex + 76
0x00001298: 2900 .) CMP r1,#0
0x0000129a: d001 .. BEQ 0x12a0 ; _printf_int_hex + 76
0x0000129c: 2302 .# MOVS r3,#2
0x0000129e: 3211 .2 ADDS r2,r2,#0x11
0x000012a0: 4620 F MOV r0,r4
0x000012a2: f000f93a ..:. BL _printf_int_common ; 0x151a
0x000012a6: bd70 p. POP {r4-r6,pc}
$d
0x000012a8: 00000452 R... DCD 1106
$t
.text
__printf
0x000012ac: b5f3 .. PUSH {r0,r1,r4-r7,lr}
0x000012ae: 4604 .F MOV r4,r0
0x000012b0: 2000 . MOVS r0,#0
0x000012b2: b081 .. SUB sp,sp,#4
0x000012b4: 6220 b STR r0,[r4,#0x20]
0x000012b6: 4620 F MOV r0,r4
0x000012b8: 68e1 .h LDR r1,[r4,#0xc]
0x000012ba: 4788 .G BLX r1
0x000012bc: 2800 .( CMP r0,#0
0x000012be: d07a z. BEQ 0x13b6 ; __printf + 266
0x000012c0: 2825 %( CMP r0,#0x25
0x000012c2: d002 .. BEQ 0x12ca ; __printf + 30
0x000012c4: 6862 bh LDR r2,[r4,#4]
0x000012c6: 68a1 .h LDR r1,[r4,#8]
0x000012c8: e071 q. B 0x13ae ; __printf + 258
0x000012ca: 68e1 .h LDR r1,[r4,#0xc]
0x000012cc: 4620 F MOV r0,r4
0x000012ce: 2500 .% MOVS r5,#0
0x000012d0: 4788 .G BLX r1
0x000012d2: 4606 .F MOV r6,r0
0x000012d4: 2000 . MOVS r0,#0
0x000012d6: 61e0 .a STR r0,[r4,#0x1c]
0x000012d8: 4607 .F MOV r7,r0
0x000012da: 61a0 .a STR r0,[r4,#0x18]
0x000012dc: 2e2a *. CMP r6,#0x2a
0x000012de: d00a .. BEQ 0x12f6 ; __printf + 74
0x000012e0: 4630 0F MOV r0,r6
0x000012e2: f000f9e6 .... BL __semihosting_library_function ; 0x16b2
0x000012e6: 2800 .( CMP r0,#0
0x000012e8: d027 '. BEQ 0x133a ; __printf + 142
0x000012ea: 00b8 .. LSLS r0,r7,#2
0x000012ec: 1900 .. ADDS r0,r0,r4
0x000012ee: 3e30 0> SUBS r6,r6,#0x30
0x000012f0: 9000 .. STR r0,[sp,#0]
0x000012f2: 6186 .a STR r6,[r0,#0x18]
0x000012f4: e019 .. B 0x132a ; __printf + 126
0x000012f6: 9802 .. LDR r0,[sp,#8]
0x000012f8: 00ba .. LSLS r2,r7,#2
0x000012fa: 1912 .. ADDS r2,r2,r4
0x000012fc: c802 .. LDM r0!,{r1}
0x000012fe: 6191 .a STR r1,[r2,#0x18]
0x00001300: 9002 .. STR r0,[sp,#8]
0x00001302: 4620 F MOV r0,r4
0x00001304: 68e1 .h LDR r1,[r4,#0xc]
0x00001306: 4788 .G BLX r1
0x00001308: 2f01 ./ CMP r7,#1
0x0000130a: 4606 .F MOV r6,r0
0x0000130c: d117 .. BNE 0x133e ; __printf + 146
0x0000130e: 69e0 .i LDR r0,[r4,#0x1c]
0x00001310: 2800 .( CMP r0,#0
0x00001312: da1f .. BGE 0x1354 ; __printf + 168
0x00001314: 2020 MOVS r0,#0x20
0x00001316: 4385 .C BICS r5,r5,r0
0x00001318: e01c .. B 0x1354 ; __printf + 168
0x0000131a: 9800 .. LDR r0,[sp,#0]
0x0000131c: 210a .! MOVS r1,#0xa
0x0000131e: 6980 .i LDR r0,[r0,#0x18]
0x00001320: 4348 HC MULS r0,r1,r0
0x00001322: 9900 .. LDR r1,[sp,#0]
0x00001324: 1980 .. ADDS r0,r0,r6
0x00001326: 3830 08 SUBS r0,r0,#0x30
0x00001328: 6188 .a STR r0,[r1,#0x18]
0x0000132a: 4620 F MOV r0,r4
0x0000132c: 68e1 .h LDR r1,[r4,#0xc]
0x0000132e: 4788 .G BLX r1
0x00001330: 4606 .F MOV r6,r0
0x00001332: f000f9be .... BL __semihosting_library_function ; 0x16b2
0x00001336: 2800 .( CMP r0,#0
0x00001338: d1ef .. BNE 0x131a ; __printf + 110
0x0000133a: 2f01 ./ CMP r7,#1
0x0000133c: d00a .. BEQ 0x1354 ; __printf + 168
0x0000133e: 2e2e .. CMP r6,#0x2e
0x00001340: d108 .. BNE 0x1354 ; __printf + 168
0x00001342: 4620 F MOV r0,r4
0x00001344: 68e1 .h LDR r1,[r4,#0xc]
0x00001346: 4788 .G BLX r1
0x00001348: 4606 .F MOV r6,r0
0x0000134a: 2020 MOVS r0,#0x20
0x0000134c: 4305 .C ORRS r5,r5,r0
0x0000134e: 1c7f .. ADDS r7,r7,#1
0x00001350: 2f02 ./ CMP r7,#2
0x00001352: dbc3 .. BLT 0x12dc ; __printf + 48
0x00001354: 69a0 .i LDR r0,[r4,#0x18]
0x00001356: 2800 .( CMP r0,#0
0x00001358: da03 .. BGE 0x1362 ; __printf + 182
0x0000135a: 4240 @B RSBS r0,r0,#0
0x0000135c: 61a0 .a STR r0,[r4,#0x18]
0x0000135e: 2001 . MOVS r0,#1
0x00001360: 4305 .C ORRS r5,r5,r0
0x00001362: 07e8 .. LSLS r0,r5,#31
0x00001364: d001 .. BEQ 0x136a ; __printf + 190
0x00001366: 2010 . MOVS r0,#0x10
0x00001368: 4385 .C BICS r5,r5,r0
0x0000136a: 2e00 .. CMP r6,#0
0x0000136c: d023 #. BEQ 0x13b6 ; __printf + 266
0x0000136e: 4630 0F MOV r0,r6
0x00001370: 3841 A8 SUBS r0,r0,#0x41
0x00001372: 2819 .( CMP r0,#0x19
0x00001374: d803 .. BHI 0x137e ; __printf + 210
0x00001376: 2001 . MOVS r0,#1
0x00001378: 02c0 .. LSLS r0,r0,#11
0x0000137a: 4305 .C ORRS r5,r5,r0
0x0000137c: 3620 6 ADDS r6,r6,#0x20
0x0000137e: 4620 F MOV r0,r4
0x00001380: 6025 %` STR r5,[r4,#0]
0x00001382: 4631 1F MOV r1,r6
0x00001384: 9a02 .. LDR r2,[sp,#8]
0x00001386: 4615 .F MOV r5,r2
0x00001388: f7fefed8 .... BL _printf_percent ; 0x13c
0x0000138c: 2800 .( CMP r0,#0
0x0000138e: d00b .. BEQ 0x13a8 ; __printf + 252
0x00001390: 2801 .( CMP r0,#1
0x00001392: d006 .. BEQ 0x13a2 ; __printf + 246
0x00001394: 1ded .. ADDS r5,r5,#7
0x00001396: 08e8 .. LSRS r0,r5,#3
0x00001398: 00c0 .. LSLS r0,r0,#3
0x0000139a: 3008 .0 ADDS r0,r0,#8
0x0000139c: 9002 .. STR r0,[sp,#8]
0x0000139e: e78a .. B 0x12b6 ; __printf + 10
0x000013a0: e009 .. B 0x13b6 ; __printf + 266
0x000013a2: 1d2d -. ADDS r5,r5,#4
0x000013a4: 9502 .. STR r5,[sp,#8]
0x000013a6: e786 .. B 0x12b6 ; __printf + 10
0x000013a8: 6862 bh LDR r2,[r4,#4]
0x000013aa: 4630 0F MOV r0,r6
0x000013ac: 68a1 .h LDR r1,[r4,#8]
0x000013ae: 4790 .G BLX r2
0x000013b0: 6a20 j LDR r0,[r4,#0x20]
0x000013b2: 1c40 @. ADDS r0,r0,#1
0x000013b4: e77e ~. B 0x12b4 ; __printf + 8
0x000013b6: 6a20 j LDR r0,[r4,#0x20]
0x000013b8: bdfe .. POP {r1-r7,pc}
.text
__aeabi_uidiv
__aeabi_uidivmod
0x000013ba: 2200 ." MOVS r2,#0
0x000013bc: 0903 .. LSRS r3,r0,#4
0x000013be: 428b .B CMP r3,r1
0x000013c0: d32c ,. BCC 0x141c ; __aeabi_idiv + 78
0x000013c2: 0a03 .. LSRS r3,r0,#8
0x000013c4: 428b .B CMP r3,r1
0x000013c6: d311 .. BCC 0x13ec ; __aeabi_idiv + 30
0x000013c8: 2300 .# MOVS r3,#0
0x000013ca: 469c .F MOV r12,r3
0x000013cc: e04e N. B 0x146c ; __aeabi_idiv + 158
__aeabi_idiv
__aeabi_idivmod
0x000013ce: 4603 .F MOV r3,r0
0x000013d0: 430b .C ORRS r3,r3,r1
0x000013d2: d43c <. BMI 0x144e ; __aeabi_idiv + 128
0x000013d4: 2200 ." MOVS r2,#0
0x000013d6: 0843 C. LSRS r3,r0,#1
0x000013d8: 428b .B CMP r3,r1
0x000013da: d331 1. BCC 0x1440 ; __aeabi_idiv + 114
0x000013dc: 0903 .. LSRS r3,r0,#4
0x000013de: 428b .B CMP r3,r1
0x000013e0: d31c .. BCC 0x141c ; __aeabi_idiv + 78
0x000013e2: 0a03 .. LSRS r3,r0,#8
0x000013e4: 428b .B CMP r3,r1
0x000013e6: d301 .. BCC 0x13ec ; __aeabi_idiv + 30
0x000013e8: 4694 .F MOV r12,r2
0x000013ea: e03f ?. B 0x146c ; __aeabi_idiv + 158
0x000013ec: 09c3 .. LSRS r3,r0,#7
0x000013ee: 428b .B CMP r3,r1
0x000013f0: d301 .. BCC 0x13f6 ; __aeabi_idiv + 40
0x000013f2: 01cb .. LSLS r3,r1,#7
0x000013f4: 1ac0 .. SUBS r0,r0,r3
0x000013f6: 4152 RA ADCS r2,r2,r2
0x000013f8: 0983 .. LSRS r3,r0,#6
0x000013fa: 428b .B CMP r3,r1
0x000013fc: d301 .. BCC 0x1402 ; __aeabi_idiv + 52
0x000013fe: 018b .. LSLS r3,r1,#6
0x00001400: 1ac0 .. SUBS r0,r0,r3
0x00001402: 4152 RA ADCS r2,r2,r2
0x00001404: 0943 C. LSRS r3,r0,#5
0x00001406: 428b .B CMP r3,r1
0x00001408: d301 .. BCC 0x140e ; __aeabi_idiv + 64
0x0000140a: 014b K. LSLS r3,r1,#5
0x0000140c: 1ac0 .. SUBS r0,r0,r3
0x0000140e: 4152 RA ADCS r2,r2,r2
0x00001410: 0903 .. LSRS r3,r0,#4
0x00001412: 428b .B CMP r3,r1
0x00001414: d301 .. BCC 0x141a ; __aeabi_idiv + 76
0x00001416: 010b .. LSLS r3,r1,#4
0x00001418: 1ac0 .. SUBS r0,r0,r3
0x0000141a: 4152 RA ADCS r2,r2,r2
0x0000141c: 08c3 .. LSRS r3,r0,#3
0x0000141e: 428b .B CMP r3,r1
0x00001420: d301 .. BCC 0x1426 ; __aeabi_idiv + 88
0x00001422: 00cb .. LSLS r3,r1,#3
0x00001424: 1ac0 .. SUBS r0,r0,r3
0x00001426: 4152 RA ADCS r2,r2,r2
0x00001428: 0883 .. LSRS r3,r0,#2
0x0000142a: 428b .B CMP r3,r1
0x0000142c: d301 .. BCC 0x1432 ; __aeabi_idiv + 100
0x0000142e: 008b .. LSLS r3,r1,#2
0x00001430: 1ac0 .. SUBS r0,r0,r3
0x00001432: 4152 RA ADCS r2,r2,r2
0x00001434: 0843 C. LSRS r3,r0,#1
0x00001436: 428b .B CMP r3,r1
0x00001438: d301 .. BCC 0x143e ; __aeabi_idiv + 112
0x0000143a: 004b K. LSLS r3,r1,#1
0x0000143c: 1ac0 .. SUBS r0,r0,r3
0x0000143e: 4152 RA ADCS r2,r2,r2
0x00001440: 1a41 A. SUBS r1,r0,r1
0x00001442: d200 .. BCS 0x1446 ; __aeabi_idiv + 120
0x00001444: 4601 .F MOV r1,r0
0x00001446: 4152 RA ADCS r2,r2,r2
0x00001448: 4610 .F MOV r0,r2
0x0000144a: 4770 pG BX lr
0x0000144c: e05d ]. B 0x150a ; __aeabi_idiv + 316
0x0000144e: 0fca .. LSRS r2,r1,#31
0x00001450: d000 .. BEQ 0x1454 ; __aeabi_idiv + 134
0x00001452: 4249 IB RSBS r1,r1,#0
0x00001454: 1003 .. ASRS r3,r0,#32
0x00001456: d300 .. BCC 0x145a ; __aeabi_idiv + 140
0x00001458: 4240 @B RSBS r0,r0,#0
0x0000145a: 4053 S@ EORS r3,r3,r2
0x0000145c: 2200 ." MOVS r2,#0
0x0000145e: 469c .F MOV r12,r3
0x00001460: 0903 .. LSRS r3,r0,#4
0x00001462: 428b .B CMP r3,r1
0x00001464: d32d -. BCC 0x14c2 ; __aeabi_idiv + 244
0x00001466: 0a03 .. LSRS r3,r0,#8
0x00001468: 428b .B CMP r3,r1
0x0000146a: d312 .. BCC 0x1492 ; __aeabi_idiv + 196
0x0000146c: 22fc ." MOVS r2,#0xfc
0x0000146e: 0189 .. LSLS r1,r1,#6
0x00001470: ba12 .. REV r2,r2
0x00001472: 0a03 .. LSRS r3,r0,#8
0x00001474: 428b .B CMP r3,r1
0x00001476: d30c .. BCC 0x1492 ; __aeabi_idiv + 196
0x00001478: 0189 .. LSLS r1,r1,#6
0x0000147a: 1192 .. ASRS r2,r2,#6
0x0000147c: 428b .B CMP r3,r1
0x0000147e: d308 .. BCC 0x1492 ; __aeabi_idiv + 196
0x00001480: 0189 .. LSLS r1,r1,#6
0x00001482: 1192 .. ASRS r2,r2,#6
0x00001484: 428b .B CMP r3,r1
0x00001486: d304 .. BCC 0x1492 ; __aeabi_idiv + 196
0x00001488: 0189 .. LSLS r1,r1,#6
0x0000148a: d03a :. BEQ 0x1502 ; __aeabi_idiv + 308
0x0000148c: 1192 .. ASRS r2,r2,#6
0x0000148e: e000 .. B 0x1492 ; __aeabi_idiv + 196
0x00001490: 0989 .. LSRS r1,r1,#6
0x00001492: 09c3 .. LSRS r3,r0,#7
0x00001494: 428b .B CMP r3,r1
0x00001496: d301 .. BCC 0x149c ; __aeabi_idiv + 206
0x00001498: 01cb .. LSLS r3,r1,#7
0x0000149a: 1ac0 .. SUBS r0,r0,r3
0x0000149c: 4152 RA ADCS r2,r2,r2
0x0000149e: 0983 .. LSRS r3,r0,#6
0x000014a0: 428b .B CMP r3,r1
0x000014a2: d301 .. BCC 0x14a8 ; __aeabi_idiv + 218
0x000014a4: 018b .. LSLS r3,r1,#6
0x000014a6: 1ac0 .. SUBS r0,r0,r3
0x000014a8: 4152 RA ADCS r2,r2,r2
0x000014aa: 0943 C. LSRS r3,r0,#5
0x000014ac: 428b .B CMP r3,r1
0x000014ae: d301 .. BCC 0x14b4 ; __aeabi_idiv + 230
0x000014b0: 014b K. LSLS r3,r1,#5
0x000014b2: 1ac0 .. SUBS r0,r0,r3
0x000014b4: 4152 RA ADCS r2,r2,r2
0x000014b6: 0903 .. LSRS r3,r0,#4
0x000014b8: 428b .B CMP r3,r1
0x000014ba: d301 .. BCC 0x14c0 ; __aeabi_idiv + 242
0x000014bc: 010b .. LSLS r3,r1,#4
0x000014be: 1ac0 .. SUBS r0,r0,r3
0x000014c0: 4152 RA ADCS r2,r2,r2
0x000014c2: 08c3 .. LSRS r3,r0,#3
0x000014c4: 428b .B CMP r3,r1
0x000014c6: d301 .. BCC 0x14cc ; __aeabi_idiv + 254
0x000014c8: 00cb .. LSLS r3,r1,#3
0x000014ca: 1ac0 .. SUBS r0,r0,r3
0x000014cc: 4152 RA ADCS r2,r2,r2
0x000014ce: 0883 .. LSRS r3,r0,#2
0x000014d0: 428b .B CMP r3,r1
0x000014d2: d301 .. BCC 0x14d8 ; __aeabi_idiv + 266
0x000014d4: 008b .. LSLS r3,r1,#2
0x000014d6: 1ac0 .. SUBS r0,r0,r3
0x000014d8: 4152 RA ADCS r2,r2,r2
0x000014da: d2d9 .. BCS 0x1490 ; __aeabi_idiv + 194
0x000014dc: 0843 C. LSRS r3,r0,#1
0x000014de: 428b .B CMP r3,r1
0x000014e0: d301 .. BCC 0x14e6 ; __aeabi_idiv + 280
0x000014e2: 004b K. LSLS r3,r1,#1
0x000014e4: 1ac0 .. SUBS r0,r0,r3
0x000014e6: 4152 RA ADCS r2,r2,r2
0x000014e8: 1a41 A. SUBS r1,r0,r1
0x000014ea: d200 .. BCS 0x14ee ; __aeabi_idiv + 288
0x000014ec: 4601 .F MOV r1,r0
0x000014ee: 4663 cF MOV r3,r12
0x000014f0: 4152 RA ADCS r2,r2,r2
0x000014f2: 105b [. ASRS r3,r3,#1
0x000014f4: 4610 .F MOV r0,r2
0x000014f6: d301 .. BCC 0x14fc ; __aeabi_idiv + 302
0x000014f8: 4240 @B RSBS r0,r0,#0
0x000014fa: 2b00 .+ CMP r3,#0
0x000014fc: d500 .. BPL 0x1500 ; __aeabi_idiv + 306
0x000014fe: 4249 IB RSBS r1,r1,#0
0x00001500: 4770 pG BX lr
0x00001502: 4663 cF MOV r3,r12
0x00001504: 105b [. ASRS r3,r3,#1
0x00001506: d300 .. BCC 0x150a ; __aeabi_idiv + 316
0x00001508: 4240 @B RSBS r0,r0,#0
0x0000150a: b501 .. PUSH {r0,lr}
0x0000150c: 2000 . MOVS r0,#0
0x0000150e: 46c0 .F MOV r8,r8
0x00001510: 46c0 .F MOV r8,r8
0x00001512: bd02 .. POP {r1,pc}
.text
__use_two_region_memory
0x00001514: 4770 pG BX lr
__rt_heap_escrow$2region
0x00001516: 4770 pG BX lr
__rt_heap_expand$2region
0x00001518: 4770 pG BX lr
.text
_printf_int_common
0x0000151a: b5ff .. PUSH {r0-r7,lr}
0x0000151c: 4604 .F MOV r4,r0
0x0000151e: 460d .F MOV r5,r1
0x00001520: b081 .. SUB sp,sp,#4
0x00001522: 3024 $0 ADDS r0,r0,#0x24
0x00001524: 9000 .. STR r0,[sp,#0]
0x00001526: 6821 !h LDR r1,[r4,#0]
0x00001528: 0688 .. LSLS r0,r1,#26
0x0000152a: d504 .. BPL 0x1536 ; _printf_int_common + 28
0x0000152c: 2210 ." MOVS r2,#0x10
0x0000152e: 69e0 .i LDR r0,[r4,#0x1c]
0x00001530: 4391 .C BICS r1,r1,r2
0x00001532: 6021 !` STR r1,[r4,#0]
0x00001534: e000 .. B 0x1538 ; _printf_int_common + 30
0x00001536: 2001 . MOVS r0,#1
0x00001538: 42a8 .B CMP r0,r5
0x0000153a: dd01 .. BLE 0x1540 ; _printf_int_common + 38
0x0000153c: 1b47 G. SUBS r7,r0,r5
0x0000153e: e000 .. B 0x1542 ; _printf_int_common + 40
0x00001540: 2700 .' MOVS r7,#0
0x00001542: 9804 .. LDR r0,[sp,#0x10]
0x00001544: 69a1 .i LDR r1,[r4,#0x18]
0x00001546: 197a z. ADDS r2,r7,r5
0x00001548: 1810 .. ADDS r0,r2,r0
0x0000154a: 1a08 .. SUBS r0,r1,r0
0x0000154c: 61a0 .a STR r0,[r4,#0x18]
0x0000154e: 7820 x LDRB r0,[r4,#0]
0x00001550: 06c0 .. LSLS r0,r0,#27
0x00001552: d402 .. BMI 0x155a ; _printf_int_common + 64
0x00001554: 4620 F MOV r0,r4
0x00001556: 46c0 .F MOV r8,r8
0x00001558: 46c0 .F MOV r8,r8
0x0000155a: 2600 .& MOVS r6,#0
0x0000155c: e008 .. B 0x1570 ; _printf_int_common + 86
0x0000155e: 9803 .. LDR r0,[sp,#0xc]
0x00001560: 6862 bh LDR r2,[r4,#4]
0x00001562: 68a1 .h LDR r1,[r4,#8]
0x00001564: 5d80 .] LDRB r0,[r0,r6]
0x00001566: 4790 .G BLX r2
0x00001568: 6a20 j LDR r0,[r4,#0x20]
0x0000156a: 1c40 @. ADDS r0,r0,#1
0x0000156c: 1c76 v. ADDS r6,r6,#1
0x0000156e: 6220 b STR r0,[r4,#0x20]
0x00001570: 9804 .. LDR r0,[sp,#0x10]
0x00001572: 4286 .B CMP r6,r0
0x00001574: dbf3 .. BLT 0x155e ; _printf_int_common + 68
0x00001576: 7820 x LDRB r0,[r4,#0]
0x00001578: 06c0 .. LSLS r0,r0,#27
0x0000157a: d50a .. BPL 0x1592 ; _printf_int_common + 120
0x0000157c: 4620 F MOV r0,r4
0x0000157e: 46c0 .F MOV r8,r8
0x00001580: 46c0 .F MOV r8,r8
0x00001582: e006 .. B 0x1592 ; _printf_int_common + 120
0x00001584: 6862 bh LDR r2,[r4,#4]
0x00001586: 68a1 .h LDR r1,[r4,#8]
0x00001588: 2030 0 MOVS r0,#0x30
0x0000158a: 4790 .G BLX r2
0x0000158c: 6a20 j LDR r0,[r4,#0x20]
0x0000158e: 1c40 @. ADDS r0,r0,#1
0x00001590: 6220 b STR r0,[r4,#0x20]
0x00001592: 4638 8F MOV r0,r7
0x00001594: 1e7f .. SUBS r7,r7,#1
0x00001596: 2800 .( CMP r0,#0
0x00001598: dcf4 .. BGT 0x1584 ; _printf_int_common + 106
0x0000159a: e007 .. B 0x15ac ; _printf_int_common + 146
0x0000159c: 9800 .. LDR r0,[sp,#0]
0x0000159e: 6862 bh LDR r2,[r4,#4]
0x000015a0: 68a1 .h LDR r1,[r4,#8]
0x000015a2: 5d40 @] LDRB r0,[r0,r5]
0x000015a4: 4790 .G BLX r2
0x000015a6: 6a20 j LDR r0,[r4,#0x20]
0x000015a8: 1c40 @. ADDS r0,r0,#1
0x000015aa: 6220 b STR r0,[r4,#0x20]
0x000015ac: 4628 (F MOV r0,r5
0x000015ae: 1e6d m. SUBS r5,r5,#1
0x000015b0: 2800 .( CMP r0,#0
0x000015b2: dcf3 .. BGT 0x159c ; _printf_int_common + 130
0x000015b4: 4620 F MOV r0,r4
0x000015b6: 46c0 .F MOV r8,r8
0x000015b8: 46c0 .F MOV r8,r8
0x000015ba: 7820 x LDRB r0,[r4,#0]
0x000015bc: 0600 .. LSLS r0,r0,#24
0x000015be: d502 .. BPL 0x15c6 ; _printf_int_common + 172
0x000015c0: 2002 . MOVS r0,#2
0x000015c2: b005 .. ADD sp,sp,#0x14
0x000015c4: bdf0 .. POP {r4-r7,pc}
0x000015c6: 2001 . MOVS r0,#1
0x000015c8: e7fb .. B 0x15c2 ; _printf_int_common + 168
0x000015ca: 0000 .. MOVS r0,r0
.text
_printf_char_file
0x000015cc: 4b08 .K LDR r3,[pc,#32] ; [0x15f0] = 0xffffed2f
0x000015ce: b570 p. PUSH {r4-r6,lr}
0x000015d0: 460d .F MOV r5,r1
0x000015d2: 447b {D ADD r3,r3,pc
0x000015d4: f000f827 ..'. BL _printf_char_common ; 0x1626
0x000015d8: 4604 .F MOV r4,r0
0x000015da: 4628 (F MOV r0,r5
0x000015dc: f7fefe99 .... BL ferror ; 0x312
0x000015e0: 2800 .( CMP r0,#0
0x000015e2: d002 .. BEQ 0x15ea ; _printf_char_file + 30
0x000015e4: 2000 . MOVS r0,#0
0x000015e6: 43c0 .C MVNS r0,r0
0x000015e8: bd70 p. POP {r4-r6,pc}
0x000015ea: 4620 F MOV r0,r4
0x000015ec: bd70 p. POP {r4-r6,pc}
$d
0x000015ee: 0000 .. DCW 0
0x000015f0: ffffed2f /... DCD 4294962479
$t
.text
__rt_udiv10
0x000015f4: 4601 .F MOV r1,r0
0x000015f6: 0880 .. LSRS r0,r0,#2
0x000015f8: 1a08 .. SUBS r0,r1,r0
0x000015fa: 0902 .. LSRS r2,r0,#4
0x000015fc: 1810 .. ADDS r0,r2,r0
0x000015fe: 0a02 .. LSRS r2,r0,#8
0x00001600: 1810 .. ADDS r0,r2,r0
0x00001602: 0c02 .. LSRS r2,r0,#16
0x00001604: 1810 .. ADDS r0,r2,r0
0x00001606: 08c0 .. LSRS r0,r0,#3
0x00001608: 0082 .. LSLS r2,r0,#2
0x0000160a: 1812 .. ADDS r2,r2,r0
0x0000160c: 0052 R. LSLS r2,r2,#1
0x0000160e: 1a89 .. SUBS r1,r1,r2
0x00001610: e001 .. B 0x1616 ; __rt_udiv10 + 34
0x00001612: 1c40 @. ADDS r0,r0,#1
0x00001614: 390a .9 SUBS r1,r1,#0xa
0x00001616: 290a .) CMP r1,#0xa
0x00001618: d2fb .. BCS 0x1612 ; __rt_udiv10 + 30
0x0000161a: 4770 pG BX lr
.text
_printf_input_char
0x0000161c: 6901 .i LDR r1,[r0,#0x10]
0x0000161e: 1c4a J. ADDS r2,r1,#1
0x00001620: 6102 .a STR r2,[r0,#0x10]
0x00001622: 7808 .x LDRB r0,[r1,#0]
0x00001624: 4770 pG BX lr
_printf_char_common
0x00001626: b500 .. PUSH {lr}
0x00001628: b08f .. SUB sp,sp,#0x3c
0x0000162a: 9102 .. STR r1,[sp,#8]
0x0000162c: 2100 .! MOVS r1,#0
0x0000162e: 9105 .. STR r1,[sp,#0x14]
0x00001630: 4905 .I LDR r1,[pc,#20] ; [0x1648] = 0xffffffe5
0x00001632: 9301 .. STR r3,[sp,#4]
0x00001634: 4479 yD ADD r1,r1,pc
0x00001636: 9103 .. STR r1,[sp,#0xc]
0x00001638: 4611 .F MOV r1,r2
0x0000163a: 9004 .. STR r0,[sp,#0x10]
0x0000163c: 4668 hF MOV r0,sp
0x0000163e: f7fffe35 ..5. BL __printf ; 0x12ac
0x00001642: b00f .. ADD sp,sp,#0x3c
0x00001644: bd00 .. POP {pc}
$d
0x00001646: 0000 .. DCW 0
0x00001648: ffffffe5 .... DCD 4294967269
$t
.text
__user_setup_stackheap
0x0000164c: 4675 uF MOV r5,lr
0x0000164e: f000f825 ..%. BL __user_libspace ; 0x169c
0x00001652: 46ae .F MOV lr,r5
0x00001654: 0005 .. MOVS r5,r0
0x00001656: 4669 iF MOV r1,sp
0x00001658: 4653 SF MOV r3,r10
0x0000165a: 08c0 .. LSRS r0,r0,#3
0x0000165c: 00c0 .. LSLS r0,r0,#3
0x0000165e: 4685 .F MOV sp,r0
0x00001660: b018 .. ADD sp,sp,#0x60
0x00001662: b520 . PUSH {r5,lr}
0x00001664: f7fefdf4 .... BL __user_initial_stackheap ; 0x250
0x00001668: bc60 `. POP {r5,r6}
0x0000166a: 2700 .' MOVS r7,#0
0x0000166c: 0849 I. LSRS r1,r1,#1
0x0000166e: 46b6 .F MOV lr,r6
0x00001670: 2600 .& MOVS r6,#0
0x00001672: c5c0 .. STM r5!,{r6,r7}
0x00001674: c5c0 .. STM r5!,{r6,r7}
0x00001676: c5c0 .. STM r5!,{r6,r7}
0x00001678: c5c0 .. STM r5!,{r6,r7}
0x0000167a: c5c0 .. STM r5!,{r6,r7}
0x0000167c: c5c0 .. STM r5!,{r6,r7}
0x0000167e: c5c0 .. STM r5!,{r6,r7}
0x00001680: c5c0 .. STM r5!,{r6,r7}
0x00001682: 3d40 @= SUBS r5,r5,#0x40
0x00001684: 0049 I. LSLS r1,r1,#1
0x00001686: 468d .F MOV sp,r1
0x00001688: 4770 pG BX lr
.text
exit
0x0000168a: b510 .. PUSH {r4,lr}
0x0000168c: 4604 .F MOV r4,r0
0x0000168e: 46c0 .F MOV r8,r8
0x00001690: 46c0 .F MOV r8,r8
0x00001692: 4620 F MOV r0,r4
0x00001694: f7fefd6c ..l. BL __rt_exit ; 0x170
0x00001698: bd10 .. POP {r4,pc}
0x0000169a: 0000 .. MOVS r0,r0
.text
__user_libspace
__user_perproc_libspace
__user_perthread_libspace
0x0000169c: 4800 .H LDR r0,[pc,#0] ; [0x16a0] = 0x20000018
0x0000169e: 4770 pG BX lr
$d
0x000016a0: 20000018 ... DCD 536870936
$t
.text
_sys_exit
0x000016a4: 4901 .I LDR r1,[pc,#4] ; [0x16ac] = 0x20026
0x000016a6: 2018 . MOVS r0,#0x18
0x000016a8: beab .. BKPT #0xab
0x000016aa: e7fe .. B 0x16aa ; _sys_exit + 6
$d
0x000016ac: 00020026 &... DCD 131110
$t
.text
__I$use$semihosting
__use_no_semihosting_swi
0x000016b0: 4770 pG BX lr
i._is_digit
.text
__semihosting_library_function
_is_digit
0x000016b2: 3830 08 SUBS r0,r0,#0x30
0x000016b4: 280a .( CMP r0,#0xa
0x000016b6: d201 .. BCS 0x16bc ; __semihosting_library_function + 10
0x000016b8: 2001 . MOVS r0,#1
0x000016ba: 4770 pG BX lr
0x000016bc: 2000 . MOVS r0,#0
0x000016be: 4770 pG BX lr
$d.realdata
.constdata
uc_hextab
0x000016c0: 33323130 0123 DCD 858927408
0x000016c4: 37363534 4567 DCD 926299444
0x000016c8: 42413938 89AB DCD 1111570744
0x000016cc: 46454443 CDEF DCD 1178944579
0x000016d0: 00583040 @0X. DCD 5779520
lc_hextab
0x000016d4: 33323130 0123 DCD 858927408
0x000016d8: 37363534 4567 DCD 926299444
0x000016dc: 62613938 89ab DCD 1650538808
0x000016e0: 66656463 cdef DCD 1717920867
0x000016e4: 00783040 @0x. DCD 7876672
Region$$Table$$Base
0x000016e8: 00001708 .... DCD 5896
0x000016ec: 20000000 ... DCD 536870912
0x000016f0: 00000018 .... DCD 24
0x000016f4: 00000104 .... DCD 260
0x000016f8: 00001720 ... DCD 5920
0x000016fc: 20000018 ... DCD 536870936
0x00001700: 00000260 `... DCD 608
0x00001704: 00000120 ... DCD 288
Region$$Table$$Limit
** Section #2 'ER_RW' (SHT_PROGBITS) [SHF_ALLOC + SHF_WRITE]
Size : 24 bytes (alignment 4)
Address: 0x20000000
** Section #3 'ER_ZI' (SHT_NOBITS) [SHF_ALLOC + SHF_WRITE]
Size : 608 bytes (alignment 8)
Address: 0x20000018
** Section #4 '.debug_abbrev' (SHT_PROGBITS)
Size : 1476 bytes
** Section #5 '.debug_frame' (SHT_PROGBITS)
Size : 3056 bytes
** Section #6 '.debug_info' (SHT_PROGBITS)
Size : 27432 bytes
** Section #7 '.debug_line' (SHT_PROGBITS)
Size : 7464 bytes
** Section #8 '.debug_loc' (SHT_PROGBITS)
Size : 7636 bytes
** Section #9 '.debug_macinfo' (SHT_PROGBITS)
Size : 377736 bytes
** Section #10 '.debug_pubnames' (SHT_PROGBITS)
Size : 2418 bytes
** Section #11 '.symtab' (SHT_SYMTAB)
Size : 7440 bytes (alignment 4)
String table #12 '.strtab'
Last local symbol no. 247
** Section #12 '.strtab' (SHT_STRTAB)
Size : 7272 bytes
** Section #13 '.note' (SHT_NOTE)
Size : 28 bytes (alignment 4)
** Section #14 '.comment' (SHT_PROGBITS)
Size : 13984 bytes
** Section #15 '.shstrtab' (SHT_STRTAB)
Size : 156 bytes
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