ChipTest/PAN159/PAN159-Template/SampleCode/Template/Keil/lst/lib_driver_xn297l.txt

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2021-09-26 09:18:47 +00:00
; generated by Component: ARM Compiler 5.06 update 4 (build 422) Tool: ArmCC [4d3604]
; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave -o.\obj\lib_driver_xn297l.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\lib_driver_xn297l.d --cpu=Cortex-M0 --apcs=interwork -O3 --diag_suppress=9931 -I..\..\..\Library\CMSIS\Include -I..\..\..\Library\Device\Nuvoton\Mini58Series\Include -I..\..\..\Library\StdDriver\inc -I..\..\Template -I..\..\..\Library\StdDriver\driver -I.\RTE\_Template -ID:\Keil_v5\ARM\PACK\Nuvoton\NuMicro_DFP\1.0.9\Device\Mini58\Include -ID:\Keil_v5\ARM\CMSIS\Include -D__MICROLIB -D__UVISION_VERSION=523 --omf_browse=.\obj\lib_driver_xn297l.crf ..\..\..\Library\StdDriver\driver\lib_driver_xn297l.c]
THUMB
AREA ||i.RF_Carrier||, CODE, READONLY, ALIGN=2
RF_Carrier PROC
;;;274 /******************************************************************************/
;;;275 void RF_Carrier( uint8_t ucChannel_Set)
000000 b500 PUSH {lr}
;;;276 {
;;;277 uint8_t BB_cal_data[] = {0x0A,0x6D,0x67,0x9C,0x46};
000002 a11a ADR r1,|L1.108|
000004 c906 LDM r1,{r1,r2}
000006 b087 SUB sp,sp,#0x1c ;276
;;;278 uint8_t RF_cal_data[] = {0xF6,0x37,0x5D};
000008 9100 STR r1,[sp,#0]
00000a 9201 STR r2,[sp,#4]
00000c a119 ADR r1,|L1.116|
00000e 6809 LDR r1,[r1,#0]
;;;279 uint8_t RF_cal2_data[] = {0x45,0x21,0xEF,0xAC,0x5A,0x50};
000010 9104 STR r1,[sp,#0x10]
000012 a119 ADR r1,|L1.120|
000014 c906 LDM r1,{r1,r2}
;;;280 uint8_t Dem_cal_data[] = {0xE1};
000016 9102 STR r1,[sp,#8]
000018 9203 STR r2,[sp,#0xc]
00001a a119 ADR r1,|L1.128|
00001c 6809 LDR r1,[r1,#0]
;;;281 uint8_t Dem_cal2_data[] = {0x0B,0xDF,0x02};
00001e 9105 STR r1,[sp,#0x14]
000020 a118 ADR r1,|L1.132|
000022 6809 LDR r1,[r1,#0]
;;;282 xn297l_write_reg(W_REGISTER + RF_CH,ucChannel_Set);
000024 9106 STR r1,[sp,#0x18]
000026 4601 MOV r1,r0
000028 2025 MOVS r0,#0x25
00002a f7fffffe BL xn297l_write_reg
;;;283 xn297l_write_reg(W_REGISTER + RF_SETUP, 0x3F); //13dbm
00002e 213f MOVS r1,#0x3f
000030 2026 MOVS r0,#0x26
000032 f7fffffe BL xn297l_write_reg
;;;284 xn297l_write_buf(W_REGISTER + BB_CAL, BB_cal_data, sizeof(BB_cal_data));
000036 2205 MOVS r2,#5
000038 4669 MOV r1,sp
00003a 203f MOVS r0,#0x3f
00003c f7fffffe BL xn297l_write_buf
;;;285 xn297l_write_buf(W_REGISTER + RF_CAL2, RF_cal2_data, sizeof(RF_cal2_data));
000040 2206 MOVS r2,#6
000042 a902 ADD r1,sp,#8
000044 203a MOVS r0,#0x3a
000046 f7fffffe BL xn297l_write_buf
;;;286 xn297l_write_buf(W_REGISTER + DEM_CAL, Dem_cal_data, sizeof(Dem_cal_data));
00004a 2201 MOVS r2,#1
00004c a905 ADD r1,sp,#0x14
00004e 2039 MOVS r0,#0x39
000050 f7fffffe BL xn297l_write_buf
;;;287 xn297l_write_buf(W_REGISTER + RF_CAL, RF_cal_data, sizeof(RF_cal_data));
000054 2203 MOVS r2,#3
000056 a904 ADD r1,sp,#0x10
000058 203e MOVS r0,#0x3e
00005a f7fffffe BL xn297l_write_buf
;;;288 xn297l_write_buf(W_REGISTER + DEM_CAL2, Dem_cal2_data,sizeof(Dem_cal2_data));
00005e 2203 MOVS r2,#3
000060 a906 ADD r1,sp,#0x18
000062 203b MOVS r0,#0x3b
000064 f7fffffe BL xn297l_write_buf
;;;289 }
000068 b007 ADD sp,sp,#0x1c
00006a bd00 POP {pc}
ENDP
|L1.108|
00006c 0a6d679c DCB "\nmg",156,"F",0
000070 4600
000072 00 DCB 0
000073 00 DCB 0
|L1.116|
000074 f6375d00 DCB 246,"7]",0
|L1.120|
000078 4521efac DCB "E!",239,172,"ZP",0
00007c 5a5000
00007f 00 DCB 0
|L1.128|
000080 e100 DCB 225,0
000082 00 DCB 0
000083 00 DCB 0
|L1.132|
000084 0bdf0200 DCB "\v",223,2,0
AREA ||i.rf_init||, CODE, READONLY, ALIGN=2
rf_init PROC
;;;201 /******************************************************************************/
;;;202 void rf_init(void)
000000 b51c PUSH {r2-r4,lr}
;;;203 {
;;;204 uint8_t addr[] = {0xE7,0xE7,0xE7};
000002 a008 ADR r0,|L2.36|
000004 6800 LDR r0,[r0,#0]
;;;205 rfspi_init();
000006 9001 STR r0,[sp,#4]
000008 f7fffffe BL rfspi_pan159_init
;;;206 xn297l_init(addr,3,20,9,XN297L_RF_POWER_P_5|XN297L_RF_DATA_RATE_1M);
00000c 202c MOVS r0,#0x2c
00000e 9000 STR r0,[sp,#0]
000010 2309 MOVS r3,#9
000012 2214 MOVS r2,#0x14
000014 2103 MOVS r1,#3
000016 a801 ADD r0,sp,#4
000018 f7fffffe BL xn297l_init
;;;207 xn297l_rx_mode();
00001c f7fffffe BL xn297l_rx_mode
;;;208 }
000020 bd1c POP {r2-r4,pc}
;;;209
ENDP
000022 0000 DCW 0x0000
|L2.36|
000024 e7e7e700 DCB 231,231,231,0
AREA ||i.xn297l_clear_fifo||, CODE, READONLY, ALIGN=1
xn297l_clear_fifo PROC
;;;133 /******************************************************************************/
;;;134 void xn297l_clear_fifo(void)
000000 b510 PUSH {r4,lr}
;;;135 {
;;;136 xn297l_write_reg(FLUSH_TX, 0); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD>
000002 2100 MOVS r1,#0
000004 20e1 MOVS r0,#0xe1
000006 f7fffffe BL xn297l_write_reg
;;;137 xn297l_write_reg(FLUSH_RX, 0); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD>
00000a 2100 MOVS r1,#0
00000c 20e2 MOVS r0,#0xe2
00000e f7fffffe BL xn297l_write_reg
;;;138 }
000012 bd10 POP {r4,pc}
;;;139
ENDP
AREA ||i.xn297l_clear_status||, CODE, READONLY, ALIGN=1
xn297l_clear_status PROC
;;;122 /******************************************************************************/
;;;123 void xn297l_clear_status(void)
000000 b510 PUSH {r4,lr}
;;;124 {
;;;125 xn297l_write_reg(W_REGISTER + RF_STATUS,0x70);
000002 2170 MOVS r1,#0x70
000004 2027 MOVS r0,#0x27
000006 f7fffffe BL xn297l_write_reg
;;;126 }
00000a bd10 POP {r4,pc}
;;;127
ENDP
AREA ||i.xn297l_get_status||, CODE, READONLY, ALIGN=1
xn297l_get_status PROC
;;;111 /******************************************************************************/
;;;112 uint8_t xn297l_get_status(void)
000000 b510 PUSH {r4,lr}
;;;113 {
;;;114 return xn297l_read_reg(RF_STATUS)&0x70; //<2F><>ȡ״ֵ̬
000002 2007 MOVS r0,#7
000004 f7fffffe BL xn297l_read_reg
000008 2170 MOVS r1,#0x70
00000a 4008 ANDS r0,r0,r1
;;;115 }
00000c bd10 POP {r4,pc}
;;;116
ENDP
AREA ||i.xn297l_init||, CODE, READONLY, ALIGN=2
xn297l_init PROC
;;;209
;;;210 void xn297l_init(uint8_t* addr,uint8_t addr_len,uint8_t chn,uint8_t payload,uint8_t rate_power)
000000 b5ff PUSH {r0-r7,lr}
;;;211 {
000002 460d MOV r5,r1
;;;212 #if ((DATA_RATE==DR_1M) || (DATA_RATE==DR_2M))
;;;213 uint8_t BB_cal_data[] = {0x12,0xED,0x67,0x9C,0x46};
000004 a03e ADR r0,|L6.256|
000006 c803 LDM r0,{r0,r1}
000008 b087 SUB sp,sp,#0x1c ;211
;;;214 uint8_t rf_cal_data[] = {0xF6,0x3F,0x5D};
00000a 9101 STR r1,[sp,#4]
00000c 9000 STR r0,[sp,#0]
00000e a03e ADR r0,|L6.264|
000010 6800 LDR r0,[r0,#0]
;;;215 uint8_t rf_cal2_data[] = {0x45,0x21,0xEF,0x2C,0x5A,0x40};
000012 a13e ADR r1,|L6.268|
000014 9004 STR r0,[sp,#0x10]
000016 c903 LDM r1,{r0,r1}
;;;216 uint8_t Dem_cal_data[] = {0x01};
000018 9103 STR r1,[sp,#0xc]
00001a 9002 STR r0,[sp,#8]
00001c a03d ADR r0,|L6.276|
00001e 6800 LDR r0,[r0,#0]
;;;217 uint8_t Dem_cal2_data[] = {0x0B,0xDF,0x02};
000020 9005 STR r0,[sp,#0x14]
000022 a03d ADR r0,|L6.280|
000024 6800 LDR r0,[r0,#0]
;;;218 #elif (DATA_RATE==DR_250K)
;;;219 uint8_t BB_cal_data[] = {0x12,0xEC,0x6F,0xA1,0x46};
;;;220 uint8_t rf_cal_data[] = {0xF6,0x3F,0x5D};
;;;221 uint8_t rf_cal2_data[] = {0xD5,0x21,0xEB,0x2C,0x5A,0x40};
;;;222 uint8_t Dem_cal_data[] = {0x1F};
;;;223 uint8_t Dem_cal2_data[] = {0x0B,0xDF,0x02};
;;;224 #endif
;;;225
;;;226 xn297l_write_reg(RST_FSPI,0x5A); //оƬ<D0BE><C6AC><EFBFBD><EFBFBD>λ
000026 9006 STR r0,[sp,#0x18]
000028 461e MOV r6,r3 ;211
00002a 215a MOVS r1,#0x5a
00002c 2053 MOVS r0,#0x53
00002e f7fffffe BL xn297l_write_reg
;;;227 xn297l_write_reg(RST_FSPI,0XA5);
000032 21a5 MOVS r1,#0xa5
000034 2053 MOVS r0,#0x53
000036 f7fffffe BL xn297l_write_reg
;;;228 delay_ms(1);
00003a 2401 MOVS r4,#1
00003c 4f37 LDR r7,|L6.284|
00003e e002 B |L6.70|
|L6.64|
000040 4638 MOV r0,r7
000042 f7fffffe BL __delay_pan159
|L6.70|
000046 1e64 SUBS r4,r4,#1
000048 d2fa BCS |L6.64|
;;;229 xn297l_clear_fifo();//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
00004a f7fffffe BL xn297l_clear_fifo
;;;230 xn297l_clear_status(); //<2F><><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD>
00004e f7fffffe BL xn297l_clear_status
;;;231 if(payload < 33)
000052 2e21 CMP r6,#0x21
000054 d201 BCS |L6.90|
;;;232 {
;;;233 #if(CE_TYPE==CE_HARDWARE_MODE)
;;;234 xn297l_write_reg(W_REGISTER +FEATURE, 0x00); //32<33>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݣ<EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2>CE
000056 2100 MOVS r1,#0
000058 e000 B |L6.92|
|L6.90|
;;;235 #else
;;;236 xn297l_write_reg(W_REGISTER +FEATURE, 0x20); //32<33>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݣ<EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>CE
;;;237 #endif
;;;238 }
;;;239 else
;;;240 {
;;;241 #if(CE_TYPE==CE_HARDWARE_MODE)
;;;242 xn297l_write_reg(W_REGISTER +FEATURE, 0x18); //64<36>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݣ<EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2>CE
00005a 2118 MOVS r1,#0x18
|L6.92|
00005c 203d MOVS r0,#0x3d
00005e f7fffffe BL xn297l_write_reg
;;;243 #else
;;;244 xn297l_write_reg(W_REGISTER +FEATURE, 0x38); //64<36>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݣ<EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>CE
;;;245 #endif
;;;246 }
;;;247
;;;248 clear_CE();
000062 2100 MOVS r1,#0
000064 20fd MOVS r0,#0xfd
000066 f7fffffe BL xn297l_write_reg
;;;249
;;;250 xn297l_write_reg(W_REGISTER + EN_RXADDR,0x03); //ʹ<>ܽ<EFBFBD><DCBD><EFBFBD>ͨ<EFBFBD><CDA8><30><CDA8>1
00006a 2103 MOVS r1,#3
00006c 2022 MOVS r0,#0x22
00006e f7fffffe BL xn297l_write_reg
;;;251 xn297l_write_reg(W_REGISTER + SETUP_AW,addr_len-2); //[1-3] = [3-5]
000072 1ea8 SUBS r0,r5,#2
000074 b2c1 UXTB r1,r0
000076 2023 MOVS r0,#0x23
000078 f7fffffe BL xn297l_write_reg
;;;252 xn297l_write_reg(W_REGISTER + RF_CH,chn); //<2F><><EFBFBD>ý<EFBFBD><C3BD><EFBFBD><EFBFBD>ŵ<EFBFBD>
00007c 2025 MOVS r0,#0x25
00007e 9909 LDR r1,[sp,#0x24]
000080 f7fffffe BL xn297l_write_reg
;;;253 xn297l_write_reg(W_REGISTER + RX_PW_P0,payload); //<2F><><EFBFBD>ý<EFBFBD><C3BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݿ<EFBFBD><DDBF>ȣ<EFBFBD><C8A3><EFBFBD>Payload<61><64><EFBFBD><EFBFBD>
000084 4631 MOV r1,r6
000086 2031 MOVS r0,#0x31
000088 f7fffffe BL xn297l_write_reg
;;;254 xn297l_write_reg(W_REGISTER + RX_PW_P1,payload); //<2F><><EFBFBD>ý<EFBFBD><C3BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݿ<EFBFBD><DDBF>ȣ<EFBFBD><C8A3><EFBFBD>Payload<61><64><EFBFBD><EFBFBD>
00008c 4631 MOV r1,r6
00008e 2032 MOVS r0,#0x32
000090 f7fffffe BL xn297l_write_reg
;;;255 xn297l_write_buf(W_REGISTER + TX_ADDR,addr, addr_len); //<2F><><EFBFBD>÷<EFBFBD><C3B7>͵<EFBFBD>ַ
000094 462a MOV r2,r5
000096 2030 MOVS r0,#0x30
000098 9907 LDR r1,[sp,#0x1c]
00009a f7fffffe BL xn297l_write_buf
;;;256 xn297l_write_buf(W_REGISTER + RX_ADDR_P0,addr, addr_len); //<2F><><EFBFBD>ý<EFBFBD><C3BD>յ<EFBFBD>ַ
00009e 462a MOV r2,r5
0000a0 202a MOVS r0,#0x2a
0000a2 9907 LDR r1,[sp,#0x1c]
0000a4 f7fffffe BL xn297l_write_buf
;;;257 xn297l_write_buf(W_REGISTER + BB_CAL,BB_cal_data, sizeof(BB_cal_data)); //<2F><><EFBFBD><EFBFBD>BB_CAL
0000a8 2205 MOVS r2,#5
0000aa 4669 MOV r1,sp
0000ac 203f MOVS r0,#0x3f
0000ae f7fffffe BL xn297l_write_buf
;;;258 xn297l_write_buf(W_REGISTER + RF_CAL2,rf_cal2_data, sizeof(rf_cal2_data)); //<2F><><EFBFBD><EFBFBD>RF_CAL2
0000b2 2206 MOVS r2,#6
0000b4 a902 ADD r1,sp,#8
0000b6 203a MOVS r0,#0x3a
0000b8 f7fffffe BL xn297l_write_buf
;;;259 xn297l_write_buf(W_REGISTER + DEM_CAL,Dem_cal_data, sizeof(Dem_cal_data)); //<2F><><EFBFBD><EFBFBD>DEM_CAL
0000bc 2201 MOVS r2,#1
0000be a905 ADD r1,sp,#0x14
0000c0 2039 MOVS r0,#0x39
0000c2 f7fffffe BL xn297l_write_buf
;;;260 xn297l_write_buf(W_REGISTER + RF_CAL,rf_cal_data, sizeof(rf_cal_data)); //<2F><><EFBFBD><EFBFBD>RF_CAL
0000c6 2203 MOVS r2,#3
0000c8 a904 ADD r1,sp,#0x10
0000ca 203e MOVS r0,#0x3e
0000cc f7fffffe BL xn297l_write_buf
;;;261 xn297l_write_buf(W_REGISTER + DEM_CAL2,Dem_cal2_data,sizeof(Dem_cal2_data));//<2F><><EFBFBD><EFBFBD>DEM_CAL2
0000d0 2203 MOVS r2,#3
0000d2 a906 ADD r1,sp,#0x18
0000d4 203b MOVS r0,#0x3b
0000d6 f7fffffe BL xn297l_write_buf
;;;262 xn297l_write_reg(W_REGISTER + DYNPD, 0x00); //<2F><>ֹ<EFBFBD><D6B9>̬Payload
0000da 2100 MOVS r1,#0
0000dc 203c MOVS r0,#0x3c
0000de f7fffffe BL xn297l_write_reg
;;;263 xn297l_write_reg(W_REGISTER + RF_SETUP,rate_power); //<2F><><EFBFBD>÷<EFBFBD><C3B7><EFBFBD>ʺ<EFBFBD><CABA><EFBFBD><EFBFBD><EFBFBD>
0000e2 2026 MOVS r0,#0x26
0000e4 9910 LDR r1,[sp,#0x40]
0000e6 f7fffffe BL xn297l_write_reg
;;;264 #if(TRANSMIT_TYPE == TRANS_ENHANCE_MODE) //<2F><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>ǿģʽ
;;;265 xn297l_write_reg(W_REGISTER + SETUP_RETR,0x03); //ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD>
;;;266 xn297l_write_reg(W_REGISTER + EN_AA, 0x01); //ʹ<><CAB9><EFBFBD>Զ<EFBFBD>Ӧ<EFBFBD><D3A6>
;;;267 #elif(TRANSMIT_TYPE == TRANS_NORMAL_MODE) //<2F><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>ͨģʽ
;;;268 xn297l_write_reg(W_REGISTER + SETUP_RETR,0x00); //<2F><>ֹ<EFBFBD>ط<EFBFBD>
0000ea 2100 MOVS r1,#0
0000ec 2024 MOVS r0,#0x24
0000ee f7fffffe BL xn297l_write_reg
;;;269 xn297l_write_reg(W_REGISTER + EN_AA, 0x00); //<2F><>ֹ<EFBFBD>Զ<EFBFBD>Ӧ<EFBFBD><D3A6>
0000f2 2100 MOVS r1,#0
0000f4 2021 MOVS r0,#0x21
0000f6 f7fffffe BL xn297l_write_reg
;;;270 #endif
;;;271 }
0000fa b00b ADD sp,sp,#0x2c
0000fc bdf0 POP {r4-r7,pc}
;;;272 /******************************************************************************/
ENDP
0000fe 0000 DCW 0x0000
|L6.256|
000100 12ed679c DCB 18,237,"g",156,"F",0
000104 4600
000106 00 DCB 0
000107 00 DCB 0
|L6.264|
000108 f63f5d00 DCB 246,"?]",0
|L6.268|
00010c 4521ef2c DCB "E!",239,",Z@",0
000110 5a4000
000113 00 DCB 0
|L6.276|
000114 0100 DCB 1,0
000116 00 DCB 0
000117 00 DCB 0
|L6.280|
000118 0bdf0200 DCB "\v",223,2,0
|L6.284|
DCD 0x00023238
AREA ||i.xn297l_read_buf||, CODE, READONLY, ALIGN=2
xn297l_read_buf PROC
;;;63 /******************************************************************************/
;;;64 void xn297l_read_buf(uint8_t reg, uint8_t *pbuf, uint8_t length)
000000 b5f8 PUSH {r3-r7,lr}
;;;65 {
000002 460f MOV r7,r1
;;;66 uint8_t i;
;;;67 rfspi_cs(0); //ʹ<><CAB9>Ƭѡ
000004 4e09 LDR r6,|L7.44|
000006 2100 MOVS r1,#0
000008 4615 MOV r5,r2 ;65
00000a 6071 STR r1,[r6,#4]
;;;68 rfspi_rwc(reg);
00000c f7fffffe BL rfspi_pan159_rwc
;;;69 for(i = 0; i < length; i++)
000010 2400 MOVS r4,#0
000012 e005 B |L7.32|
|L7.20|
;;;70 {
;;;71 pbuf[i] = rfspi_rwc(0x00); //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
000014 2000 MOVS r0,#0
000016 f7fffffe BL rfspi_pan159_rwc
00001a 5538 STRB r0,[r7,r4]
00001c 1c64 ADDS r4,r4,#1
00001e b2e4 UXTB r4,r4 ;69
|L7.32|
000020 42ac CMP r4,r5 ;69
000022 d3f7 BCC |L7.20|
;;;72 }
;;;73 rfspi_cs(1); //<2F><><EFBFBD><EFBFBD>Ƭѡ
000024 2001 MOVS r0,#1
000026 6070 STR r0,[r6,#4]
;;;74 }
000028 bdf8 POP {r3-r7,pc}
;;;75
ENDP
00002a 0000 DCW 0x0000
|L7.44|
DCD 0x50004200
AREA ||i.xn297l_read_reg||, CODE, READONLY, ALIGN=2
xn297l_read_reg PROC
;;;30 /******************************************************************************/
;;;31 uint8_t xn297l_read_reg(uint8_t reg)
000000 b510 PUSH {r4,lr}
;;;32 {
;;;33 uint8_t tmp;
;;;34 rfspi_cs(0); //ʹ<><CAB9>Ƭѡ
000002 4c05 LDR r4,|L8.24|
000004 2100 MOVS r1,#0
000006 6061 STR r1,[r4,#4]
;;;35 rfspi_rwc(reg); //д<><D0B4><EFBFBD>ļĴ<C4BC><C4B4><EFBFBD><EFBFBD>ĵ<EFBFBD>ַ
000008 f7fffffe BL rfspi_pan159_rwc
;;;36 tmp = rfspi_rwc(0x00); //<2F><>ȡ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ֵ
00000c 2000 MOVS r0,#0
00000e f7fffffe BL rfspi_pan159_rwc
;;;37 rfspi_cs(1); //<2F><><EFBFBD><EFBFBD>Ƭѡ
000012 2101 MOVS r1,#1
000014 6061 STR r1,[r4,#4]
;;;38 return tmp;
;;;39 }
000016 bd10 POP {r4,pc}
;;;40 /******************************************************************************/
ENDP
|L8.24|
DCD 0x50004200
AREA ||i.xn297l_rx_data||, CODE, READONLY, ALIGN=2
xn297l_rx_data PROC
;;;183 /******************************************************************************/
;;;184 uint8_t xn297l_rx_data(uint8_t *data,uint8_t length)
000000 b510 PUSH {r4,lr}
;;;185 {
;;;186 if(IRQ_STATUS)
000002 4a09 LDR r2,|L9.40|
000004 6a92 LDR r2,[r2,#0x28]
000006 2a00 CMP r2,#0
000008 d001 BEQ |L9.14|
;;;187 {
;;;188 return 0; //<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD>
00000a 2000 MOVS r0,#0
;;;189 }
;;;190 xn297l_read_buf(R_RX_PAYLOAD,data,length); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
;;;191 xn297l_write_reg(FLUSH_RX,0); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD>
;;;192 xn297l_clear_status(); //<2F><><EFBFBD><EFBFBD>״̬
;;;193 return 1;
;;;194 }
00000c bd10 POP {r4,pc}
|L9.14|
00000e 460a MOV r2,r1 ;190
000010 4601 MOV r1,r0 ;190
000012 2061 MOVS r0,#0x61 ;190
000014 f7fffffe BL xn297l_read_buf
000018 2100 MOVS r1,#0 ;191
00001a 20e2 MOVS r0,#0xe2 ;191
00001c f7fffffe BL xn297l_write_reg
000020 f7fffffe BL xn297l_clear_status
000024 2001 MOVS r0,#1 ;193
000026 bd10 POP {r4,pc}
;;;195
ENDP
|L9.40|
DCD 0x50004280
AREA ||i.xn297l_rx_mode||, CODE, READONLY, ALIGN=1
xn297l_rx_mode PROC
;;;96 /******************************************************************************/
;;;97 void xn297l_rx_mode(void)
000000 b510 PUSH {r4,lr}
;;;98 {
;;;99 // uint8_t rf_cal_data[] = {0x06,0x37,0x5D};
;;;100 // rf_write_buf(W_REGISTER + RF_CAL,rf_cal_data, sizeof(rf_cal_data));//<2F><><EFBFBD><EFBFBD>RF_CAL
;;;101 xn297l_write_reg(W_REGISTER + CONFIG,0X8F); // rf<72><66><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>ģʽ
000002 218f MOVS r1,#0x8f
000004 2020 MOVS r0,#0x20
000006 f7fffffe BL xn297l_write_reg
;;;102 set_CE();
00000a 2100 MOVS r1,#0
00000c 20fd MOVS r0,#0xfd
00000e f7fffffe BL xn297l_write_reg
;;;103 //delay_ms(1);
;;;104 }
000012 bd10 POP {r4,pc}
;;;105
ENDP
AREA ||i.xn297l_set_addr||, CODE, READONLY, ALIGN=1
xn297l_set_addr PROC
;;;156 /******************************************************************************/
;;;157 void xn297l_set_addr(uint8_t reg,uint8_t *rf_addr_array,uint8_t addr_len)
000000 b510 PUSH {r4,lr}
;;;158 {
000002 3020 ADDS r0,r0,#0x20
;;;159 xn297l_write_buf(W_REGISTER + reg,rf_addr_array, addr_len);//<2F><><EFBFBD>õ<EFBFBD>ַ
000004 b2c0 UXTB r0,r0
000006 f7fffffe BL xn297l_write_buf
;;;160 }
00000a bd10 POP {r4,pc}
;;;161 /******************************************************************************/
ENDP
AREA ||i.xn297l_set_channel||, CODE, READONLY, ALIGN=1
xn297l_set_channel PROC
;;;145 /******************************************************************************/
;;;146 void xn297l_set_channel(uint8_t channel)
000000 b510 PUSH {r4,lr}
;;;147 {
;;;148 // current_channel = channel;
;;;149 xn297l_write_reg(W_REGISTER + RF_CH, channel);
000002 4601 MOV r1,r0
000004 2025 MOVS r0,#0x25
000006 f7fffffe BL xn297l_write_reg
;;;150 }
00000a bd10 POP {r4,pc}
;;;151 /******************************************************************************/
ENDP
AREA ||i.xn297l_tx_data||, CODE, READONLY, ALIGN=2
xn297l_tx_data PROC
;;;166 /******************************************************************************/
;;;167 void xn297l_tx_data(uint8_t *data, uint8_t length)
000000 b570 PUSH {r4-r6,lr}
;;;168 {
000002 460c MOV r4,r1
000004 4605 MOV r5,r0
;;;169 set_CE();
000006 2100 MOVS r1,#0
000008 20fd MOVS r0,#0xfd
00000a f7fffffe BL xn297l_write_reg
;;;170 delay_us(100);
00000e 204b MOVS r0,#0x4b
000010 0100 LSLS r0,r0,#4
000012 f7fffffe BL __delay_pan159
;;;171 xn297l_write_buf(W_TX_PAYLOAD,data,length); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
000016 4622 MOV r2,r4
000018 4629 MOV r1,r5
00001a 20a0 MOVS r0,#0xa0
00001c f7fffffe BL xn297l_write_buf
;;;172 while(IRQ_STATUS);
000020 4807 LDR r0,|L13.64|
|L13.34|
000022 6a81 LDR r1,[r0,#0x28]
000024 2900 CMP r1,#0
000026 d1fc BNE |L13.34|
;;;173 xn297l_clear_status(); //<2F><><EFBFBD><EFBFBD>״̬
000028 f7fffffe BL xn297l_clear_status
;;;174 xn297l_write_reg(FLUSH_TX,0); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD>
00002c 2100 MOVS r1,#0
00002e 20e1 MOVS r0,#0xe1
000030 f7fffffe BL xn297l_write_reg
;;;175 clear_CE();
000034 2100 MOVS r1,#0
000036 20fd MOVS r0,#0xfd
000038 f7fffffe BL xn297l_write_reg
;;;176 }
00003c bd70 POP {r4-r6,pc}
;;;177
ENDP
00003e 0000 DCW 0x0000
|L13.64|
DCD 0x50004280
AREA ||i.xn297l_tx_mode||, CODE, READONLY, ALIGN=1
xn297l_tx_mode PROC
;;;81 /******************************************************************************/
;;;82 void xn297l_tx_mode(void)
000000 b510 PUSH {r4,lr}
;;;83 {
;;;84 // uint8_t rf_cal_data[] = {0xF6,0x37,0x5D};
;;;85 // rf_write_buf(W_REGISTER + RF_CAL,rf_cal_data, sizeof(rf_cal_data));//<2F><><EFBFBD><EFBFBD>RF_CAL
;;;86 xn297l_write_reg(W_REGISTER + CONFIG,0x8E); // rf<72><66><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>ģʽ
000002 218e MOVS r1,#0x8e
000004 2020 MOVS r0,#0x20
000006 f7fffffe BL xn297l_write_reg
;;;87 clear_CE();
00000a 2100 MOVS r1,#0
00000c 20fd MOVS r0,#0xfd
00000e f7fffffe BL xn297l_write_reg
;;;88 delay_us(20);
000012 20f0 MOVS r0,#0xf0
000014 f7fffffe BL __delay_pan159
;;;89 }
000018 bd10 POP {r4,pc}
;;;90
ENDP
AREA ||i.xn297l_write_buf||, CODE, READONLY, ALIGN=2
xn297l_write_buf PROC
;;;45 /******************************************************************************/
;;;46 void xn297l_write_buf(uint8_t reg,uint8_t *pbuf,uint8_t length)
000000 b5f8 PUSH {r3-r7,lr}
;;;47 {
000002 460f MOV r7,r1
;;;48 uint8_t i;
;;;49 rfspi_cs(0); //ʹ<><CAB9>Ƭѡ
000004 4e08 LDR r6,|L15.40|
000006 2100 MOVS r1,#0
000008 4615 MOV r5,r2 ;47
00000a 6071 STR r1,[r6,#4]
;;;50 rfspi_rwc(reg);
00000c f7fffffe BL rfspi_pan159_rwc
;;;51 for(i = 0;i < length; i++)
000010 2400 MOVS r4,#0
000012 e004 B |L15.30|
|L15.20|
;;;52 {
;;;53 rfspi_rwc(pbuf[i]); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
000014 5d38 LDRB r0,[r7,r4]
000016 f7fffffe BL rfspi_pan159_rwc
00001a 1c64 ADDS r4,r4,#1
00001c b2e4 UXTB r4,r4 ;51
|L15.30|
00001e 42ac CMP r4,r5 ;51
000020 d3f8 BCC |L15.20|
;;;54 }
;;;55 rfspi_cs(1); //<2F><><EFBFBD><EFBFBD>Ƭѡ
000022 2001 MOVS r0,#1
000024 6070 STR r0,[r6,#4]
;;;56 }
000026 bdf8 POP {r3-r7,pc}
;;;57
ENDP
|L15.40|
DCD 0x50004200
AREA ||i.xn297l_write_reg||, CODE, READONLY, ALIGN=2
xn297l_write_reg PROC
;;;17 /******************************************************************************/
;;;18 void xn297l_write_reg(uint8_t reg,uint8_t data)
000000 b570 PUSH {r4-r6,lr}
;;;19 {
000002 460d MOV r5,r1
;;;20 rfspi_cs(0); //ʹ<><CAB9>Ƭѡ
000004 4c05 LDR r4,|L16.28|
000006 2100 MOVS r1,#0
000008 6061 STR r1,[r4,#4]
;;;21 rfspi_rwc(reg); //д<><D0B4><EFBFBD>ļĴ<C4BC><C4B4><EFBFBD><EFBFBD>ĵ<EFBFBD>ַ
00000a f7fffffe BL rfspi_pan159_rwc
;;;22 rfspi_rwc(data); //д<><D0B4><EFBFBD>ļĴ<C4BC><C4B4><EFBFBD><EFBFBD><EFBFBD>ֵ
00000e 4628 MOV r0,r5
000010 f7fffffe BL rfspi_pan159_rwc
;;;23 rfspi_cs(1); //<2F><><EFBFBD><EFBFBD>Ƭѡ
000014 2001 MOVS r0,#1
000016 6060 STR r0,[r4,#4]
;;;24 }
000018 bd70 POP {r4-r6,pc}
;;;25 /******************************************************************************/
ENDP
00001a 0000 DCW 0x0000
|L16.28|
DCD 0x50004200
;*** Start embedded assembler ***
#line 1 "..\\..\\..\\Library\\StdDriver\\driver\\lib_driver_xn297l.c"
AREA ||.rev16_text||, CODE
THUMB
EXPORT |__asm___19_lib_driver_xn297l_c_fd081504____REV16|
#line 388 "..\\..\\..\\Library\\CMSIS\\Include\\cmsis_armcc.h"
|__asm___19_lib_driver_xn297l_c_fd081504____REV16| PROC
#line 389
rev16 r0, r0
bx lr
ENDP
AREA ||.revsh_text||, CODE
THUMB
EXPORT |__asm___19_lib_driver_xn297l_c_fd081504____REVSH|
#line 402
|__asm___19_lib_driver_xn297l_c_fd081504____REVSH| PROC
#line 403
revsh r0, r0
bx lr
ENDP
;*** End embedded assembler ***